Patents by Inventor Vijay Nagarajan
Vijay Nagarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11963060Abstract: Techniques are disclosed relating to handover of WLAN voice calls to one or more cellular networks. In some embodiments, a device is configured to perform voice communications over one or more wireless local area networks, communicate with a first network using a first cellular radio access technology (RAT), and communicate with a second network using a second cellular RAT. The device may store, based on communications via the first network, information indicating that the first network does not support voice communications for the apparatus. The device may handover a voice call from a wireless local network directly to the second cellular RAT, based on the stored information and without handover of the voice call to the first cellular RAT, based on call conditions on the wireless local area network.Type: GrantFiled: October 4, 2022Date of Patent: April 16, 2024Assignee: Apple Inc.Inventors: Yifan Zhu, Vijay Venkataraman, Viswanath Nagarajan, Sang Ho Baek, Lakshmi N. Kavuri, Utkarsh Kumar, Krisztian Kiss, Shivani Suresh Babu, Srinivasan Nimmala
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Publication number: 20240071729Abstract: Embodiments of radio frequency (RF) power connection rods are provided herein. In some embodiments, an RF power connection rod includes a first connection rod having a first connection end, a first socket end opposite the first connection end, and a first hollow portion extending from the first connection end to the first socket end; a second connection rod having a second connection end, a second socket end opposite the second connection end, and a second hollow portion extending from the second connection end to the second socket end, wherein the second connection end is adjustably coupled to the first connection end along an axial direction of the second connection rod, and wherein a gas flow path extends from one or more gas inlets of the first connection rod, through the first hollow portion to the second hollow portion, to one or more gas outlets disposed through the second connection rod; a first plug coupled to the first socket end; and a second plug coupled to the second socket end.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Inventors: Kumaresan NAGARAJAN, Yue GUO, Vijay SINGH, Adarsh BALAREDDY
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Publication number: 20240045877Abstract: Various aspects of this disclosure provide digital data processing systems for using encrypted variant data objects to facilitate queries of sensitive data. In one example, a digital data processing system can receive sensitive data about an entity. The digital data processing system can create, in an identity data repository and from the sensitive data, a searchable secure entity data object for the entity. The searchable secure entity data object is usable for servicing a query regarding the entity. For instance, a transformed query parameter can be generated from a query parameter in the query. The query can be serviced by matching the transformed query parameter to tokenized variant data in the searchable secure entity data object and retrieving tokenized sensitive data from the searchable secure entity data object.Type: ApplicationFiled: October 16, 2023Publication date: February 8, 2024Inventors: Yuvaraj SANKARAN, Vijay NAGARAJAN
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Publication number: 20230403224Abstract: Described embodiments provide systems and methods for classifying a machine by performance. A device may identify, for a first time window, a first plurality of attributes of a machine and a session provided by the machine. The device may determine a first score based at least on a weight applied to each of the first plurality of attributes. The weight may be updated using a second plurality of attributes of the machine and the session provided by the machine for a second time window. The device may determine a probability of failure for the session by applying the first plurality of attributes to a model. The device may generate a second score indicating a performance of the machine as a function of the first score and the probability of failure. The device may classify the machine into a performance level in accordance with the second score.Type: ApplicationFiled: June 14, 2022Publication date: December 14, 2023Inventors: Vinay George Roy, Vikramjeet Singh Sandhu, Mukesh Garg, Vijay Nagarajan, Vindhya Gajanan, Abhyudaya Anand, Prabhjeet Singh Chawla
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Patent number: 11816116Abstract: Various aspects of this disclosure provide digital data processing systems for using encrypted variant data objects to facilitate queries of sensitive data. In one example, a digital data processing system can receive sensitive data about an entity. The digital data processing system can create, in an identity data repository and from the sensitive data, a searchable secure entity data object for the entity. The searchable secure entity data object is usable for servicing a query regarding the entity. For instance, a transformed query parameter can be generated from a query parameter in the query. The query can be serviced by matching the transformed query parameter to tokenized variant data in the searchable secure entity data object and retrieving tokenized sensitive data from the searchable secure entity data object.Type: GrantFiled: March 22, 2019Date of Patent: November 14, 2023Assignee: Equifax, Inc.Inventors: Yuvaraj Sankaran, Vijay Nagarajan
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Patent number: 11544066Abstract: A branch target buffer, BTB, is provided to store at least one BTB entry corresponding to a respective branch in a control flow in a sequence of machine-readable instructions of a computer program. The BTB has a tag field to compare with a program counter of a fetch address generator and at least one further field to store information characteristic of the branch instruction identified by the corresponding tag field and allowing a conditional branch to be distinguished from an unconditional branch instruction. The BTB has a predetermined storage capacity and is utilized such that unconditional branch instructions are preferentially allocated storage space in the BTB relative to conditional branch instructions.Type: GrantFiled: February 11, 2019Date of Patent: January 3, 2023Assignee: The University Court of the University of EdinburghInventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan
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Patent number: 11494294Abstract: Certain aspects involve models for generating code executed on data-processing platforms. One example involves receiving an electronic data-processing model, which generates an analytical output from input attributes weighted with respective modeling coefficients. A target data-processing platform is identified that requires bin ranges for the modeling coefficients and reason codes for the input attributes. Modeling code is generated that implements the electronic data-processing model with the bin ranges and the reason codes. The processor outputs executable code that implements the electronic data-processing model.Type: GrantFiled: February 2, 2021Date of Patent: November 8, 2022Assignee: EQUIFAX INC.Inventors: Rajesh Indurthivenkata, Lalithadevi Venkataramani, Aparna Somaka, Xingjun Zhang, Matthew Turner, Bhawana Koshyari, Vijay Nagarajan, James Reid, Nandita Thakur
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Patent number: 11296808Abstract: An interference canceller comprises a composite interference vector (CIV) generator configured to produce a CIV by combining soft and/or hard estimates of interference, an interference-cancelling operator configured for generating a soft projection operator, and a soft-projection canceller configured for performing a soft projection of the received baseband signal to output an interference-cancelled signal. Weights used in the soft-projection operator are selected to maximize a post-processing SINR.Type: GrantFiled: May 26, 2020Date of Patent: April 5, 2022Assignee: III Holdings 1, LLCInventors: Michael L. McCloud, Vijay Nagarajan
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Patent number: 11269641Abstract: A data processing apparatus is provided having branch prediction circuitry, the branch prediction circuitry having a Branch Target Buffer, BTB. A fetch target queue receives entries corresponding to a sequence of instruction addresses, at least one of the sequence having been predicted using the branch prediction circuitry. A fetch engine is provided to fetch instruction addresses taken from a top of the fetch target queue whilst a prefetch engine sends a prefetch probe to an instruction cache. The BTB is to detect a BTB miss when attempting to populate a storage slot of the fetch target queue and the BTB triggers issuance of a BTB miss probe to the memory to fetch at least one instruction from the memory to resolve the BTB miss using branch-prediction based prefetching.Type: GrantFiled: February 1, 2018Date of Patent: March 8, 2022Assignee: THE UNIVERSITY COURT OF THE UNIVERSITY OF EDINBURGHInventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan, Cheng Chieh Huang
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Publication number: 20210157717Abstract: Certain aspects involve models for generating code executed on data-processing platforms. One example involves receiving an electronic data-processing model, which generates an analytical output from input attributes weighted with respective modeling coefficients. A target data-processing platform is identified that requires bin ranges for the modeling coefficients and reason codes for the input attributes. Modeling code is generated that implements the electronic data-processing model with the bin ranges and the reason codes. The processor outputs executable code that implements the electronic data-processing model.Type: ApplicationFiled: February 2, 2021Publication date: May 27, 2021Inventors: Rajesh INDURTHIVENKATA, Lalithadevi VENKATARAMANI, Aparna SOMAKA, Xingjun ZHANG, Matthew TURNER, Bhawana KOSHYARI, Vijay NAGARAJAN, James REID, Nandita THAKUR
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Patent number: 10942842Abstract: Certain aspects involve building and debugging models for generating source code executed on data-processing platforms. One example involves receiving an electronic data-processing model, which generates an analytical output from input attributes weighted with respective modeling coefficients. A target data-processing platform is identified that requires bin ranges for the modeling coefficients and reason codes for the input attributes. Bin ranges and reason codes are identified. Modeling code is generated that implements the electronic data-processing model with the bin ranges and the reason codes. The processor outputs source code, which is generated from the modeling code, in a programming language used by the target data-processing platform.Type: GrantFiled: September 27, 2019Date of Patent: March 9, 2021Assignee: EQUIFAX INC.Inventors: Rajesh Indurthivenkata, Lalithadevi Venkataramani, Aparna Somaka, Xingjun Zhang, Matthew Turner, Bhawana Koshyari, Vijay Nagarajan, James Reid, Nandita Thakur
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Publication number: 20210004233Abstract: A branch target buffer, BTB, is provided to store at least one BTB entry corresponding to a respective branch in a control flow in a sequence of machine-readable instructions of a computer program. The BTB has a tag field to compare with a program counter of a fetch address generator and at least one further field to store information characteristic of the branch instruction identified by the corresponding tag field and allowing a conditional branch to be distinguished from an unconditional branch instruction. The BTB has a predetermined storage capacity and is utilized such that unconditional branch instructions are preferentially allocated storage space in the BTB relative to conditional branch instructions.Type: ApplicationFiled: February 11, 2019Publication date: January 7, 2021Inventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan
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Publication number: 20210004373Abstract: Various aspects of this disclosure provide digital data processing systems for using encrypted variant data objects to facilitate queries of sensitive data. In one example, a digital data processing system can receive sensitive data about an entity. The digital data processing system can create, in an identity data repository and from the sensitive data, a searchable secure entity data object for the entity. The searchable secure entity data object is usable for servicing a query regarding the entity. For instance, a transformed query parameter can be generated from a query parameter in the query. The query can be serviced by matching the transformed query parameter to tokenized variant data in the searchable secure entity data object and retrieving tokenized sensitive data from the searchable secure entity data object.Type: ApplicationFiled: March 22, 2019Publication date: January 7, 2021Inventors: Yuvaraj SANKARAN, Vijay NAGARAJAN
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Publication number: 20200287645Abstract: An interference canceller comprises a composite interference vector (CIV) generator configured to produce a CIV by combining soft and/or hard estimates of interference, an interference-cancelling operator configured for generating a soft projection operator, and a soft-projection canceller configured for performing a soft projection of the received baseband signal to output an interference-cancelled signal. Weights used in the soft-projection operator are selected to maximize a post-processing SINR.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Inventors: MICHAEL L. McCLOUD, VIJAY NAGARAJAN
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Patent number: 10666373Abstract: An interference canceller comprises a composite interference vector (CIV) generator configured to produce a CIV by combining soft and/or hard estimates of interference, an interference-cancelling operator configured for generating a soft projection operator, and a soft-projection canceller configured for performing a soft projection of the received baseband signal to output an interference-cancelled signal. Weights used in the soft-projection operator are selected to maximize a post-processing SINR.Type: GrantFiled: August 13, 2018Date of Patent: May 26, 2020Assignee: III HOLDINGS 1, L.L.C.Inventors: Michael L. McCloud, Vijay Nagarajan
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Publication number: 20200026642Abstract: Certain aspects involve building and debugging models for generating source code executed on data-processing platforms. One example involves receiving an electronic data-processing model, which generates an analytical output from input attributes weighted with respective modeling coefficients. A target data-processing platform is identified that requires bin ranges for the modeling coefficients and reason codes for the input attributes. Bin ranges and reason codes are identified. Modeling code is generated that implements the electronic data-processing model with the bin ranges and the reason codes. The processor outputs source code, which is generated from the modeling code, in a programming language used by the target data-processing platform.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Rajesh INDURTHIVENKATA, Lalithadevi VENKATARAMANI, Aparna SOMAKA, Xingjun ZHANG, Matthew TURNER, Bhawana KOSHYARI, Vijay NAGARAJAN, James REID, Nandita THAKUR
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Publication number: 20200004543Abstract: A data processing apparatus is provided having branch prediction circuitry, the branch prediction circuitry having a Branch Target Buffer, BTB. A fetch target queue receives entries corresponding to a sequence of instruction addresses, at least one of the sequence having been predicted using the branch prediction circuitry. A fetch engine is provided to fetch instruction addresses taken from a top of the fetch target queue whilst a prefetch engine sends a prefetch probe to an instruction cache. The BTB is to detect a BTB miss when attempting to populate a storage slot of the fetch target queue and the BTB triggers issuance of a BTB miss probe to the memory to fetch at least one instruction from the memory to resolve the BTB miss using branch-prediction based prefetching.Type: ApplicationFiled: February 1, 2018Publication date: January 2, 2020Inventors: RAKESH KUMAR, BORIS GROT, VIJAY NAGARAJAN, CHENG CHIEH HUANG
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Patent number: 10474566Abstract: Certain aspects involve building and debugging models for generating source code executed on data-processing platforms. A target data-processing platform is identified that requires bin ranges for modeling coefficients and reason codes for input attributes. A processor outputs source code, which is generated from a modeling code, in a programming language used by the target data-processing platform.Type: GrantFiled: August 5, 2016Date of Patent: November 12, 2019Assignee: Equifax Inc.Inventors: Rajesh Indurthivenkata, Lalithadevi Venkataramani, Aparna Somaka, Xingjun Zhang, Matthew Turner, Bhawana Koshyari, Vijay Nagarajan, James Reid, Nandita Thakur
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Publication number: 20190012257Abstract: Certain aspects involve building and debugging models for generating source code executed on data-processing platforms. A target data-processing platform is identified that requires bin ranges for modeling coefficients and reason codes for input attributes. A processor outputs source code, which is generated from a modeling code, in a programming language used by the target data-processing platform.Type: ApplicationFiled: August 5, 2016Publication date: January 10, 2019Inventors: Rajesh Indurthivenkata, Lalithadevi Venkataramani, Aparna Somaka, Xingjun Zhang, Matthew Turner, Bhawana Koshyari, Vijay Nagarajan, James Reid, Nandita THAKUR
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Patent number: 10153805Abstract: This invention teaches to the details of an interference suppressing receiver for suppressing intra-cell and inter-cell interference in coded, multiple-access, spread spectrum transmissions that propagate through frequency selective communication channels to a multiplicity of receive antennas. The receiver is designed or adapted through the repeated use of symbol-estimate weighting, subtractive suppression with a stabilizing step-size, and mixed-decision symbol estimates. Receiver embodiments may be designed, adapted, and implemented explicitly in software or programmed hardware, or implicitly in standard RAKE-based hardware either within the RAKE (i.e., at the finger level) or outside the RAKE (i.e., at the user or subchannel symbol level). Embodiments may be employed in user equipment on the forward link or in a base station on the reverse link. It may be adapted to general signal processing applications where a signal is to be extracted from interference.Type: GrantFiled: August 22, 2016Date of Patent: December 11, 2018Assignee: III HOLDINGS 1, LLCInventors: Tommy Guess, Michael L. McCloud, Vijay Nagarajan, Gagandeep Singh Lamba