Abstract: Aspects of the present disclosure relate to split-scalarization of thread-local objects in optimized object code. A computer-implemented method includes receiving source code including at least one programmed method and at least one reference within the at least one programmed method that accesses at least one field of at least one object; determining that the at least one field of the at least one object is scalarizable over a region of the at least one programmed method; performing scalarization of the at least one field of the at least one object over the region of the at least one programmed method; and outputting optimized object code with the at least one field of the at least one object scalarized over the region of the at least one programmed method and with another field of the at least one object unscalarized in a different region of the at least one programmed.

Abstract: A method or system for estimating delays in design under tests (DUTs) using machine learning. The system accesses multiple DUTs, each comprising various logic blocks. For each DUT, a combinatorial path is identified, connecting one or more logic blocks. A feature vector is generated, including values of orthogonal features representing the combinatorial path's characteristics. Each DUT is compiled for emulation, and the delay of its combinatorial path is measured. These measured delays, along with the corresponding feature vectors, are used to train a machine learning delay model. The trained model is designed to receive a combinatorial path of a DUT as input and generate an estimated wire delay as output. This approach leverages machine learning to predict delays in electronic designs, improving the efficiency and accuracy of delay estimations in complex circuits.

Abstract: The present specification describes a computer-implemented method. A first comparison test is executed to determine whether an unknown object is of a first sub-class of a class of objects. Responsive to determining that the unknown object is not of the first sub-class, it is determined whether the unknown object is an instance of a second sub-class by determining whether there are additional sub-classes other than the first sub-class and a second sub-class. Responsive to determining that there are additional sub-classes, the second code fragment executes while refraining from assuming the unknown object is of a particular sub-class.

Abstract: A method or system for estimating delays in design under tests (DUTs) using machine learning. The system accesses multiple DUTs, each comprising various logic blocks. For each DUT, a combinatorial path is identified, connecting one or more logic blocks. A feature vector is generated, including values of orthogonal features representing the combinatorial path's characteristics. Each DUT is compiled for emulation, and the delay of its combinatorial path is measured. These measured delays, along with the corresponding feature vectors, are used to train a machine learning delay model. The trained model is designed to receive a combinatorial path of a DUT as input and generate an estimated wire delay as output. This approach leverages machine learning to predict delays in electronic designs, improving the efficiency and accuracy of delay estimations in complex circuits.

Abstract: Aspects of the invention include systems and methods configured to checkpoint an application executing on a virtual machine. Aspects include receiving from a first thread executing on a virtual machine a call to a checkpoint application program interface (API) and suspending, by the virtual machine, execution of all threads other than the first thread. Aspects also includes executing, by the virtual machine, all application checkpoint hooks and executing, by the virtual machine, all virtual machine checkpoint hooks. Aspects further include creating one or more checkpoint image files.

Abstract: A delay estimation system estimates a delay of a DUT for an emulation system. The delay estimation system receives logic blocks of the DUT and a combinatorial path connecting one or more of the logic blocks. The system applies a delay model to a feature vector representing the combinatorial path, where the delay model can determine a delay of the combinatorial path. The delay model may be a machine learning model. The system generates a timing graph using the determined delay and provides the timing graph to a compiler to perform placement and routing of the DUT.

Abstract: Vectorization and scalarization of methods are provided. A plurality of node webs is constructed based on traversing an intermediate representation of a program. Transitive closure of the plurality of node webs is performed to form a set of final node webs. It is determined that each respective node in the set of final node webs can be converted into one of vector operation code or a sequence of scalar operation codes based on at least one node including a specified vector length and only one vector length value being specified within the set of final node webs. Each respective node in the set of final node webs is converted into one of corresponding vector operation code or a corresponding sequence of scalar operation codes to accelerate execution of supported and unsupported methods of the program.

Abstract: Improving execution of application program instructions by receiving code having a security classification, determining that the code is untrusted according to the security classification and inserting instructions for a cache flush associated with executing the code.

Abstract: An embodiment performs escape analysis of a function as a compiler optimization and stack-allocates an object referenced by the function. At runtime, the embodiment includes detecting a hot code replacement of a portion of the function while the referenced object is stored in stack memory. Responsive to detecting the hot code replacement, the embodiment includes allocating heap memory for the object and moving the object from the stack memory to the allocated heap memory. The embodiment also updates references to the object that were pointing to the object in the stack memory to instead point to the object in the heap memory.

Abstract: A delay estimation system estimates a delay of a DUT for an emulation system. The delay estimation system receives logic blocks of the DUT and a combinatorial path connecting one or more of the logic blocks. The system applies a delay model to a feature vector representing the combinatorial path, where the delay model can determine a delay of the combinatorial path. The delay model may be a machine learning model. The system generates a timing graph using the determined delay and provides the timing graph to a compiler to perform placement and routing of the DUT.

Abstract: An embodiment includes requesting, by a compiler responsive to execution of a first code segment, a first profile dataset associated with the first code segment. The embodiment also includes executing, responsive to receiving an indication that the first profile dataset is not available, a querying process that searches other code segments based on specified criteria relating to an attribute of the first code segment. The embodiment also includes receiving a search result from the querying process, where the search result includes a second code segment. The embodiment also includes generating an extrapolated profile dataset based at least in part on the second code segment. The embodiment stores the extrapolated profile dataset in memory associated with the first code segment, and the compiler performs an optimization process on the first code segment using the extrapolated profile dataset.

Abstract: Embodiments of the present invention comprise a class sharing orchestrator (CSO) operating as a subsystem of a container orchestrator. The CSO manages sharing of class data among containerized applications to improve startup performance, CPU consumption and memory footprint. The CSO stores application class data in a shared class cache (SCC). The CSO provides a compatible SCC to every deployed application running within the CSO's purview. The CSO collects SCC data from running applications, and processes the data offline to continuously improve the quality of SCCs provided to each deployment, while causing minimum impact to running applications. The CSO combines updates from running applications of a given type to generate an improved quality SCC for use by newly launched applications of the same type. The CSO comprises an SCC update mechanism that optimizes the size, and network traffic, associated with SCC data exchange, and guarantees SCC quality improves over time.

Abstract: A method list is built for a currently executing application within a process virtual machine at a snapshot point, the method list comprising a set of methods capable of being executed by the currently executing application after the snapshot point, the snapshot point comprising an execution state of the currently executing application when a snapshot process is triggered. Profiling data of the currently executing application, collected prior to reaching the snapshot point, is committed, to a designated storage location. Using the profiling data and a just-in-time compiler of the process virtual machine, a method in the method list is compiled. Snapshot data comprising data of the execution state of the currently executing application at the snapshot point, including a result of the compiling, is stored.

Abstract: An embodiment performs escape analysis of a function as a compiler optimization and stack-allocates an object referenced by the function. At runtime, the embodiment includes detecting a hot code replacement of a portion of the function while the referenced object is stored in stack memory. Responsive to detecting the hot code replacement, the embodiment includes allocating heap memory for the object and moving the object from the stack memory to the allocated heap memory. The embodiment also updates references to the object that were pointing to the object in the stack memory to instead point to the object in the heap memory.

Abstract: An approach is provided for optimizing reference counting. Responsive to receiving code representing a program by a just-in-time compiler, one or more processors in computing machinery supporting transactional memory identify regions of the code having respective sets of reference counting operations executed dynamically. Identifying the regions of the code uses an analysis of semantics of the code. The identified regions are enclosed in respective transactions. The code that was to perform atomic operations, including the reference counting operations in the identified regions, is transformed into new code that performs non-atomic operations that are variants of the atomic operations. Fallback code sequences are inserted into the transformed code. In a non-transactional manner and in response to detections of failures in respective transactions, the fallback code sequences execute original code sequences that were in the code prior to the transformation of the code.

Abstract: Improving execution of application program instructions by receiving code having a security classification, determining that the code is untrusted according to the security classification and inserting instructions for a cache flush associated with executing the code.

Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.

Abstract: An approach is provided in which an information handling system selects an assumption point in a software program corresponding to a compile-time assumption made by a compiler, and selects an assumption violation point in the software program corresponding to a location at which the compile-time assumption can be violated at runtime. The information handling system propagates backwards in the software program from the assumption point and reaches the assumption violation point. The information handling system determines that the assumption point corresponds to a first method and the assumption violation point corresponds to a second method that is different from the first method, and inserts a conditional transition in the software program at the assumption violation point. The information handling system executes a compiled version of the software program that includes the conditional transition.

Abstract: An enhanced object allocation optimization selectively traverses an intermediate representation detecting on-stack replacement transitions, which when found are analyzed to determine whether a control flow-edge from a first block to a second block that is marked as an OSR resumption block exists. Responding to when the second block is marked, a pseudo call including arguments of all live local variables holding pointers to objects is inserted into the intermediate representation while optimization opportunities exist and executing a modified escape analysis on a modified intermediate representation examining each pseudo call as an escape point for all object references received by the pseudo call as arguments; ignoring uses of local variables dominated by these pseudo calls; and stack allocating objects to handle the non-local control flow due to on-stack replacement control flow using the pseudo call.

Abstract: An enhanced object allocation optimization selectively traverses an intermediate representation detecting on-stack replacement transitions, which when found are analyzed to determine whether a control flow-edge from a first block to a second block that is marked as an OSR resumption block exists. Responding to when the second block is marked, a pseudo call including arguments of all live local variables holding pointers to objects is inserted into the intermediate representation while optimization opportunities exist and executing a modified escape analysis on a modified intermediate representation examining each pseudo call as an escape point for all object references received by the pseudo call as arguments; ignoring uses of local variables dominated by these pseudo calls; and stack allocating objects to handle the non-local control flow due to on-stack replacement control flow using the pseudo call.