Patents by Inventor Vijaya Janarthanam

Vijaya Janarthanam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240143170
    Abstract: A system includes a memory device having a plurality of blocks. A first subset of the plurality of blocks is configured as single-level cell (SLC) memory and a second subset of the plurality of blocks is configured as multi-level cell (MLC) memory. A processing device, operatively coupled to the memory device, determines that a first block of a set of blocks of the first subset is a bad block. The processing device converts a second block of the set of blocks to the MLC memory of the second subset, wherein the second block is located in a neighboring plane of the memory device from that of the first block. The processing device converts a media endurance metric value of the second block from SLC-type to MLC-type.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: Vinay Vijendra Kumar Lakshmi, Vijaya Janarthanam
  • Publication number: 20230367486
    Abstract: Methods, systems, and devices for block conversion to preserve memory capacity are described. A device may perform a quantity of one or more access operations on a block that includes a set of memory cells configured as single-level cells each of which is configured for storing multiple bits. After performing the quantity of one or more access operations on the block the device may convert the set of memory cells from single-level cells into multiple-level cells configured for storing multiple bits. The device may then determine a remaining quantity of access operations permitted to be performed on the block and operate the bloc based on the remaining quantity of access operations.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 16, 2023
    Inventors: Vinay Vijendra Kumar Lakshmi, Vijaya Janarthanam
  • Patent number: 10838629
    Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 17, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni, Vijaya Janarthanam, Judah Gamliel Hahn
  • Publication number: 20200097188
    Abstract: After an ungraceful shutdown (UGSD) event, a data storage apparatus restores a fast boot-up table from a copy stored in a non-volatile memory (NVM), and receives a first read command from a host. The first read command includes a request to read data from a logical block address (LBA). The apparatus maintains a fast boot-up table that includes a plurality of entries, and each entry includes an LBA and an associated physical block address of the NVM. If the LBA is contained in the fast boot-up table, the apparatus determines a first physical block address associated with the LBA using the fast boot-up table. The apparatus reads data from the NVM at the first physical block address, prior to completing an initialization process of the data storage apparatus, and transmits the data read from the NVM to the host.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Sridhar Prudvi Raj Gunda, Lalit Mohan Soni, Vijaya Janarthanam, Judah Gamliel Hahn