Abstract: In some embodiments, power may be temporarily removed from a first portion of a computer system (such as a display), and that power redirected to a second portion (such as a processor or System on a Chip), so that extra performance may be obtained from the second portion without exceeding the power budget for the system. If the first portion is a display, the time period of removed power may be short enough that the absence of luminance during that time period will not be noticeable to the human vision system. In a similar embodiment, power may be delivered to the first portion using pulse width modulation, using the time between pulses to redirect power to the other portion.

Abstract: A first optimal CPU frequency that produces minimal power consumption for a CPU/platform combination may be calculated by using an Efficiency Aware Race to Halt (EARtH) algorithm, which ignores the power efficiency curve of the voltage regulator (VR). These results may then be modified by applying the power efficiency curve of the associated VR to determine a second optimal CPU frequency that produces power consumption that is less than the value calculated by the EARtH algorithm.

Abstract: In some examples, display backlight strings are grouped into at least two groups based on characteristics of the display backlight strings. A first of the at least two groups of display backlight strings is operated at a first operating voltage. A second of the at least two groups of display backlight strings is operated at a second operating voltage.

Abstract: In some embodiments, power may be temporarily removed from a first portion of a computer system (such as a display), and that power redirected to a second portion (such as a processor or System on a Chip), so that extra performance may be obtained from the second portion without exceeding the power budget for the system. If the first portion is a display, the time period of removed power may be short enough that the absence of luminance during that time period will not be noticeable to the human vision system. In a similar embodiment, power may be delivered to the first portion using pulse width modulation, using the time between pulses to redirect power to the other portion.

Abstract: A first optimal CPU frequency that produces minimal power consumption for a CPU/platform combination may be calculated by using an Efficiency Aware Race to Halt (EARtH) algorithm, which ignores the power efficiency curve of the voltage regulator (VR). These results may then be modified by applying the power efficiency curve of the associated VR to determine a second optimal CPU frequency that produces power consumption that is less than the value calculated by the EARtH algorithm.