Patents by Inventor Vijayakumar MURUGESAN

Vijayakumar MURUGESAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230332319
    Abstract: A method for selectively recovering a rare earth element (REE) from an alloy includes applying a potential of from -3.5 V to 0 V to an electrochemical cell comprising a anode, a cathode, and an electrolyte, wherein (i) the anode comprises an alloy comprising a REE, (ii) the cathode comprises a noble metal, and (iii) the electrolyte comprises an alkali metal or alkaline earth metal salt and a nonaqueous solvent. Under the applied potential, at least some of the REE is oxidatively dissolved from the anode and is electrodeposited onto the cathode to form an REE deposit.
    Type: Application
    Filed: April 13, 2023
    Publication date: October 19, 2023
    Applicant: Battelle Memorial Institute
    Inventors: Hyung-Seok Lim, Wei Wang, Vijayakumar Murugesan, Chinmayee Venkata Subban, Tasya S. Nasoetion
  • Publication number: 20230318040
    Abstract: Disclosed herein is an aluminum-ether-based composition that can serve a dual role as either an electrolyte for use in batteries and/or as an electroplating bath for ambient temperature aluminum deposition. The aluminum-ether-based composition facilitates aluminum ion transport between anodes and cathodes and thus can be used to replace expensive and hydroscopic ionic liquid electrolytes typically used for aluminum-based batteries. The aluminum-ether-based composition also can be used for causing aluminum deposition at ambient temperature and thus can be used to form aluminum-containing coatings with less energy consumption.
    Type: Application
    Filed: April 3, 2023
    Publication date: October 5, 2023
    Applicant: Battelle Memorial Institute
    Inventors: Dan Thien Nguyen, Vijayakumar Murugesan, Venkateshkumar Prabhakaran, Karl T. Mueller
  • Publication number: 20230006229
    Abstract: Aqueous anolytes for redox flow batteries are disclosed. The anolytes include a fluorenone-fluorenol derivative, an additive comprising an organic compound including one or more proton acceptor groups, an alkali metal hydroxide, and water. The additive functions as a homogeneous organocatalyst and may increase the current density of an aqueous redox flow battery including the anolyte.
    Type: Application
    Filed: May 19, 2022
    Publication date: January 5, 2023
    Applicant: Battelle Memorial Institute
    Inventors: Ruozhu Feng, Wei Wang, Xin Zhang, Yangang Liang, Aaron M. Hollas, Yuyan Shao, Vijayakumar Murugesan, Ying Chen
  • Patent number: 10616139
    Abstract: Within a time period, a plurality of selected requests that are each associated with a weight is received. For the plurality of received selected requests, a single quota request is synchronously provided for a quota associated with all of the plurality of received selected requests. The quota is received. The selected requests are sorted in an order based on the weights of the received selected requests. Based on the order of the sort, only a number of the selected requests that meets the quota is allowed.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: April 7, 2020
    Assignee: Google LLC
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Patent number: 10178046
    Abstract: Within a time period, a plurality of selected requests that are each associated with a weight is received. For the plurality of received selected requests, a single quota request is synchronously provided for a quota associated with all of the plurality of received selected requests. The quota is received. The selected requests are sorted in an order based on the weights of the received selected requests. Based on the order of the sort, only a number of the selected requests that meets the quota is allowed.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 8, 2019
    Assignee: Google LLC
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Patent number: 9864684
    Abstract: Performing efficient cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries at a cache storage: determining whether an invalidation pattern included in the invalidation request matches an invalidation pattern associated with an existing invalidation entry of an invalidation data structure; in the event that the invalidation pattern included in the invalidation request matches the invalidation pattern associated with the existing invalidation entry of the invalidation data structure, updating the existing invalidation entry with an invalidation timestamp included in the invalidation request, and in the event that the invalidation pattern included in the invalidation request does not match invalidation patterns associated with existing invalidation entries of the invalidation data structure, generating a new invalidation entry in the invalidation data structure with the invalidation pattern and the invalidation timestamp included in the
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: January 9, 2018
    Assignee: Google Inc.
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Publication number: 20170329708
    Abstract: Performing efficient cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries at a cache storage: determining whether an invalidation pattern included in the invalidation request matches an invalidation pattern associated with an existing invalidation entry of an invalidation data structure; in the event that the invalidation pattern included in the invalidation request matches the invalidation pattern associated with the existing invalidation entry of the invalidation data structure, updating the existing invalidation entry with an invalidation timestamp included in the invalidation request, and in the event that the invalidation pattern included in the invalidation request does not match invalidation patterns associated with existing invalidation entries of the invalidation data structure, generating a new invalidation entry in the invalidation data structure with the invalidation pattern and the invalidation timestamp included in the
    Type: Application
    Filed: July 10, 2017
    Publication date: November 16, 2017
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Patent number: 9703705
    Abstract: Performing cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries at a cache storage: determining whether an invalidation pattern included in the invalidation request matches an invalidation pattern associated with an existing invalidation entry of an invalidation data structure; in the event that the invalidation pattern included in the invalidation request matches the invalidation pattern associated with the existing invalidation entry of the invalidation data structure, updating the existing invalidation entry with an invalidation timestamp included in the invalidation request, and in the event that the invalidation pattern included in the invalidation request does not match invalidation patterns associated with existing invalidation entries of the invalidation data structure, generating a new invalidation entry in the invalidation data structure with the invalidation pattern and the invalidation timestamp included in the invalidati
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: July 11, 2017
    Assignee: Google Inc.
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Publication number: 20170024319
    Abstract: Performing efficient cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries at a cache storage: determining whether an invalidation pattern included in the invalidation request matches an invalidation pattern associated with an existing invalidation entry of an invalidation data structure; in the event that the invalidation pattern included in the invalidation request matches the invalidation pattern associated with the existing invalidation entry of the invalidation data structure, updating the existing invalidation entry with an invalidation timestamp included in the invalidation request, and in the event that the invalidation pattern included in the invalidation request does not match invalidation patterns associated with existing invalidation entries of the invalidation data structure, generating a new invalidation entry in the invalidation data structure with the invalidation pattern and the invalidation timestamp included in the
    Type: Application
    Filed: September 30, 2016
    Publication date: January 26, 2017
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Patent number: 9489306
    Abstract: Performing cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries of a cache storage, wherein the cache storage is configured to store cache entries; storing the invalidation request to invalidate the one or more invalidated cache entries in an invalidation data structure; prior to removing the one or more invalidated cache entries from the cache storage, receiving a data retrieval request for a requested cache entry from the cache storage; and using the invalidation data structure to determine whether the requested cache entry has been invalidated.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: November 8, 2016
    Assignee: Apigee Corporation
    Inventors: Vijayakumar Murugesan, Vedant Bhangale
  • Publication number: 20150006641
    Abstract: Lockless distributed counting of message requests. A plurality of message requests is received from a client by a plurality of message processors. A local count, for one time slot, is incremented in each message processor of the plurality of message processors based on the plurality of message requests. A global count in a shared state system, for one version, is incremented by value of the local count at a preconfigured time interval, the local count being decremented to a value zero. A global count in each message processor of the plurality of message processors is then synchronized, asynchronously, with the global count in the shared state system. The local count and the global count are subsequently reset in each message processor of the plurality of message processors to the value zero for a next time slot.
    Type: Application
    Filed: June 26, 2013
    Publication date: January 1, 2015
    Applicant: Apigee Corporation
    Inventors: Vijayakumar MURUGESAN, Vaidhyanathan Mayilrangam Gopalan