Patents by Inventor Vijendra Sahi

Vijendra Sahi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050279274
    Abstract: The present invention is directed to compositions of matter, systems, and methods to manufacture nanowires. In an embodiment, a buffer layer is placed on a nanowire growth substrate and catalytic nanoparticles are added to form a catalytic-coated nanowire growth substrate. Methods to develop and use this catalytic-coated nanowire growth substrate are disclosed. In a further aspect of the invention, in an embodiment a nanowire growth system using a foil roller to manufacture nanowires is provided.
    Type: Application
    Filed: April 12, 2005
    Publication date: December 22, 2005
    Inventors: Chunming Niu, Jay Goldman, Xiangfeng Duan, Vijendra Sahi
  • Patent number: 6962823
    Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: November 8, 2005
    Assignee: Nanosys, Inc.
    Inventors: Stephen Empedocles, Larry Bock, Calvin Chow, Xianfeng Duan, Chungming Niu, George Pontis, Vijendra Sahi, Linda T. Romano, David Stumbo
  • Publication number: 20050230356
    Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.
    Type: Application
    Filed: May 31, 2005
    Publication date: October 20, 2005
    Applicant: NANOSYS, Inc.
    Inventors: Stephen Empedocles, Larry Bock, Calvin Chow, Xianfeng Duan, Chunming Niu, George Pontis, Vijendra Sahi, Linda Romano, David Stumbo
  • Publication number: 20050181587
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Application
    Filed: April 13, 2005
    Publication date: August 18, 2005
    Applicant: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
  • Publication number: 20050110064
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Application
    Filed: December 3, 2004
    Publication date: May 26, 2005
    Applicant: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
  • Publication number: 20050079659
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 14, 2005
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Parce, Jay Goldman
  • Patent number: 6872645
    Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: March 29, 2005
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Hugh Daniels, Chunming Niu, Vijendra Sahi, James Hamilton, Linda T. Romano
  • Publication number: 20040005723
    Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.
    Type: Application
    Filed: April 1, 2003
    Publication date: January 8, 2004
    Applicant: NANOSYS, Inc.
    Inventors: Stephen Empedocles, Larry Bock, Calvin Chow, Xianfeng Duan, Chungming Niu, George Pontis, Vijendra Sahi, Linda T. Romano, David Stumbo
  • Publication number: 20030186522
    Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.
    Type: Application
    Filed: September 10, 2002
    Publication date: October 2, 2003
    Applicant: Nanosys, Inc.
    Inventors: Xiangfeng Duan, Hugh Daniels, Chunming Niu, Vijendra Sahi, James Hamilton, Linda T. Romano