Patents by Inventor Vijit A. Sabnis
Vijit A. Sabnis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190013430Abstract: Compound semiconductor alloys comprising dilute nitride materials, are materials used in absorbing layers for photodetectors, power converters, solar cells, and in particular to high efficiency, electronic and optoelectronic devices, including multijunction solar cells, photodetectors, power converters, and the like, formed primarily of III-V semiconductor alloys. The absorbing (or active) layers achieve improved characteristics including band gap optimization and minimization of defects.Type: ApplicationFiled: September 14, 2018Publication date: January 10, 2019Applicant: Solar Junction CorporationInventors: Rebecca Elizabeth JONES-ALBERTUS, Pranob MISRA, Michael J. SHELDON, Homan B. YUEN, Ting LIU, Daniel DERKACS, Vijit SABNIS, Michael West WIEMER, Ferran SUAREZ
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Publication number: 20180358499Abstract: Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.Type: ApplicationFiled: August 14, 2018Publication date: December 13, 2018Inventors: REBECCA ELIZABETH JONES-ALBERTUS, DANIEL DERKACS, TING LIU, PRANOB MISRA, EVAN PICKETT, VIJIT SABNIS, MICHAEL J. SHELDON, FERRAN SUAREZ, MICHAEL WIEMER, HOMAN B. YUEN
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Patent number: 9627561Abstract: A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.Type: GrantFiled: April 6, 2015Date of Patent: April 18, 2017Assignee: SOLAR JUNCTION CORPORATIONInventors: Onur Fidaner, Michael West Wiemer, Vijit A. Sabnis, Ewelina Lucow
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Patent number: 9337360Abstract: A multi junction solar cell is provided with a non-alloyed ohmic contact metallization stack by inversion of the top semiconductor layer from n-type to p-type and including the utilization of a tunnel junction. Alternatively, the non-alloyed ohmic contact can be achieved by changing the top semiconductor layer from a higher bandgap material to a lower bandgap material.Type: GrantFiled: November 11, 2010Date of Patent: May 10, 2016Assignee: Solar Junction CorporationInventors: Michael W. Wiemer, Homan B. Yuen, Vijit A. Sabnis, Ting Liu, Pranob Misra, Michael J. Sheldon, Onur Fidaner
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Patent number: 9263611Abstract: A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.Type: GrantFiled: November 16, 2012Date of Patent: February 16, 2016Assignee: Solar Junction CorporationInventors: Onur Fidaner, Michael West Wiemer, Vijit A. Sabnis, Ewelina N. Lucow
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Publication number: 20150372178Abstract: Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.Type: ApplicationFiled: January 30, 2015Publication date: December 24, 2015Inventors: Rebecca Elizabeth Jones-Albertus, Pranob Misra, Michael J. Sheldon, Homan B. Yuen, Ting Liu, Daniel Derkacs, Vijit Sabnis, Michael West Wiemer, Ferran Suarez
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Publication number: 20150349181Abstract: A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.Type: ApplicationFiled: April 6, 2015Publication date: December 3, 2015Inventors: ONUR FIDANER, MICHAEL WEST WIEMER, VIJIT A. SABNIS, EWELINA LUCOW
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Patent number: 8962993Abstract: Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.Type: GrantFiled: December 7, 2012Date of Patent: February 24, 2015Assignee: Solar Junction CorporationInventors: Rebecca Elizabeth Jones-Albertus, Pranob Misra, Michael J. Sheldon, Homan B. Yuen, Ting Liu, Daniel Derkacs, Vijit Sabnis, Michael West Wiemer, Ferran Suarez
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Publication number: 20140137930Abstract: High efficiency multijunction solar cells formed primarily of III-V semiconductor alloys and methods of making high efficiency multijunction solar cells are disclosed.Type: ApplicationFiled: November 14, 2013Publication date: May 22, 2014Applicant: SOLAR JUNCTION CORPORATIONInventors: DANIEL DERKACS, REBECCA JONES-ALBERTUS, VIJIT SABNIS, FERRAN SUAREZ
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Patent number: 8697481Abstract: Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.Type: GrantFiled: December 7, 2012Date of Patent: April 15, 2014Assignee: Solar Junction CorporationInventors: Rebecca Elizabeth Jones-Albertus, Pranob Misra, Michael J. Sheldon, Homan B. Yuen, Ting Liu, Daniel Derkacs, Vijit Sabnis, Micahel West Wiemer, Ferran Suarez
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Publication number: 20130312817Abstract: A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.Type: ApplicationFiled: November 16, 2012Publication date: November 28, 2013Applicant: Solar Junction CorporationInventors: Onur Fidaner, Michael West Wiemer, Vijit A. Sabnis, Ewelina N. Lucow
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Patent number: 8331410Abstract: A light emitting device with a ?-cavity including a first spacer of single crystal dielectric material and an active area including single crystal erbium dielectric material positioned on the first spacer. The erbium dielectric material and the single crystal dielectric material of the first spacer are substantially crystal lattice matched at their juncture. A second spacer of single crystal dielectric material is positioned on the active area. The erbium dielectric material and the single crystal dielectric material of the second spacer are substantially crystal lattice matched at the second surface. The high-? erbium dielectric provides a high gain ?-cavity that emits increased amounts of light in either spontaneous or stimulated modes of operation.Type: GrantFiled: December 10, 2009Date of Patent: December 11, 2012Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Patent number: 7967653Abstract: A full color display comprising a red, a green, and a blue light emitting diode, each light emitting diode including a light emitting region having at least one layer of single crystal rare earth material, the rare earth material in each of the light emitting diodes having at least one radiative transition, and the rare earth material producing a radiation wavelength of approximately 640 nm in the red light emitting diode, 540 nm in the green light emitting diode, and 460 nm in the blue light emitting diode. Generally, the color of each LED is determined by selecting a rare earth with a radiative transition producing a radiation wavelength at the selected color. In cases where the rare earth has more than one radiative transition, tuned mirrors can be used to select the desired color.Type: GrantFiled: September 28, 2009Date of Patent: June 28, 2011Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Publication number: 20110114163Abstract: An “n-on-p” type multijunction solar cell structure is disclosed using an n-type substrate for the epitaxial growth of III-V semiconductor material, wherein a “p-on-n” tunnel junction diode is disposed between the substrate and one or more heteroepitaxial layers of III-V semiconductor materials.Type: ApplicationFiled: November 11, 2010Publication date: May 19, 2011Applicant: Solar Junction CorporationInventors: Michael W. Wiemer, Homan B. Yuen, Vijit A. Sabnis, Michael J. Sheldon
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Publication number: 20110108908Abstract: A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of material having a second dielectric constant different than the first dielectric constant and a second thickness different than the first thickness. The first layer of material is positioned adjacent the substrate material and the second layer of material is positioned adjacent the active layer. Drain and source regions are formed in the active layer so as to be fully depleted. The drain and source regions are separated by a channel region in the active layer. A gate insulating layer overlies the channel region and a gate stack is positioned on the gate insulating region. It is anticipated that the structure is most useful for channel regions less than 90 nm long.Type: ApplicationFiled: September 29, 2010Publication date: May 12, 2011Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Publication number: 20100319764Abstract: Tunnel junctions are improved by providing a rare earth-Group V interlayer such as erbium arsenide (ErAs) to yield a mid-gap state-assisted tunnel diode structure. Such tunnel junctions survive thermal energy conditions (time/temperature) in the range required for dilute nitride material integration into III-V multi-junction solar cells.Type: ApplicationFiled: June 21, 2010Publication date: December 23, 2010Applicant: Solar Junction Corp.Inventors: Michael W. Wiemer, Homan B. Yuen, Vijit A. Sabnis, Michael J. Sheldon, Ilya Fushman
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Patent number: 7821066Abstract: A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of material having a second dielectric constant different than the first dielectric constant and a second thickness different than the first thickness. The first layer of material is positioned adjacent the substrate material and the second layer of material is positioned adjacent the active layer. Drain and source regions are formed in the active layer so as to be fully depleted. The drain and source regions are separated by a channel region in the active layer. A gate insulating layer overlies the channel region and a gate stack is positioned on the gate insulating region. It is anticipated that the structure is most useful for channel regions less than 90 nm long.Type: GrantFiled: December 8, 2006Date of Patent: October 26, 2010Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Publication number: 20100112736Abstract: A full color display comprising a red, a green, and a blue light emitting diode, each light emitting diode including a light emitting region having at least one layer of single crystal rare earth material, the rare earth material in each of the light emitting diodes having at least one radiative transition, and the rare earth material producing a radiation wavelength of approximately 640 nm in the red light emitting diode, 540 nm in the green light emitting diode, and 460 nm in the blue light emitting diode. Generally, the color of each LED is determined by selecting a rare earth with a radiative transition producing a radiation wavelength at the selected color. In cases where the rare earth has more than one radiative transition, tuned mirrors can be used to select the desired color.Type: ApplicationFiled: September 28, 2009Publication date: May 6, 2010Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Publication number: 20100084680Abstract: A light emitting device with a p-cavity including a first spacer of single crystal dielectric material and an active area including single crystal erbium dielectric material positioned on the first spacer. The erbium dielectric material and the single crystal dielectric material of the first spacer are substantially crystal lattice matched at their juncture. A second spacer of single crystal dielectric material is positioned on the active area. The erbium dielectric material and the single crystal dielectric material of the second spacer are substantially crystal lattice matched at the second surface. The high-? erbium dielectric provides a high gain ?-cavity that emits increased amounts of light in either spontaneous or stimulated modes of operation.Type: ApplicationFiled: December 10, 2009Publication date: April 8, 2010Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic
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Patent number: 7643526Abstract: A light emitting device with a ?-cavity including a first spacer of single crystal dielectric material and an active area including single crystal erbium dielectric material positioned on the first spacer. The erbium dielectric material and the single crystal dielectric material of the first spacer are substantially crystal lattice matched at their juncture. A second spacer of single crystal dielectric material is positioned on the active area. The erbium dielectric material and the single crystal dielectric material of the second spacer are substantially crystal lattice matched at the second surface. The high-? erbium dielectric provides a high gain ?-cavity that emits increased amounts of light in either spontaneous or stimulated modes of operation.Type: GrantFiled: June 21, 2006Date of Patent: January 5, 2010Inventors: Michael Lebby, Vijit Sabnis, Petar B. Atanackovic