Patents by Inventor Vikas Choudhary
Vikas Choudhary has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240429762Abstract: A rotor for an electrical machine extends along a longitudinal axis between a drive end and an axially opposite non-drive end, the drive end being attachable to a torque input. The rotor includes: a rotor body extending axially between the drive end and the non-drive and extending in a radial direction orthogonal to the longitudinal axis between an inner side and an outer side, plurality of permanent magnets attached to the inner side a circumferentially distributed about the longitudinal axis, wherein the rotor body includes a plurality of lamination sheets stacked along the longitudinal axis.Type: ApplicationFiled: November 25, 2021Publication date: December 26, 2024Inventors: Ziad Azar, Balazs Janos Becs, Vikas Choudhary, Edom Demissie, Erik Groendahl, Bo Nedergaard Jacobsen, Adriana Cristina Urda
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Publication number: 20220067538Abstract: Certain aspects of the present disclosure provide techniques for generating knowledge graphs from program source code. An example method generally includes receiving a source code definition of a workflow implemented in an application. The source code definition of the workflow is converted into an intermediate representation of the workflow, the intermediate representation comprising a condensed version of the source code definition. An abstract syntax tree representation of the workflow is generated based on the intermediate representation of the workflow. A structured file is generated by traversing the abstract syntax tree representation of the workflow, wherein the structured file comprises a definition of the workflow in a knowledge graph-specific language. The structured file is deployed to a knowledge graph execution engine.Type: ApplicationFiled: September 3, 2020Publication date: March 3, 2022Inventors: Vikas CHOUDHARY, Harsh Mohan MODAWEL, Vinoth Jeba Kumar RADHA KRISHNAN, Ganesh BHAT
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Patent number: 9238580Abstract: A MEMS sensor includes a micro-electromechanical structure, a detection circuit, and a self-test circuit to test the health of the MEMS sensor during runtime operations. The self-test circuit is configured to inject into the micro-electromechanical structure a plurality of injected test signals that are broad-band frequency-varying frequency signals, which are based on spread spectrum based modulation. The injected test signals may a magnitude that is below an observable threshold of the sensor signal as well as a test-signal bandwidth that overlaps with a substantial portion of the sensor bandwidth, including the stimulus of interest.Type: GrantFiled: March 11, 2013Date of Patent: January 19, 2016Assignee: Analog Devices GlobalInventors: Kamatchi Saravanan Alagarsamy, William A. Clark, Jishnu Choyi, James M. Lee, Vikas Choudhary
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Publication number: 20140250969Abstract: A MEMS sensor includes a micro-electromechanical structure, a detection circuit, and a self-test circuit to test the health of the MEMS sensor during runtime operations. The self-test circuit is configured to inject into the micro-electromechanical structure a plurality of injected test signals that are broad-band frequency-varying frequency signals, which are based on spread spectrum based modulation. The injected test signals may a magnitude that is below an observable threshold of the sensor signal as well as a test-signal bandwidth that overlaps with a substantial portion of the sensor bandwidth, including the stimulus of interest.Type: ApplicationFiled: March 11, 2013Publication date: September 11, 2014Applicant: ANALOG DEVICES TECHNOLOGYInventors: Kamatchi Saravanan Alagarsamy, William A. Clark, Jishnu Choyi, James M. Lee, Vikas Choudhary
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Patent number: 8396441Abstract: A mixer circuit suitable for broadband RF applications is disclosed. A unique biasing scheme for a conventional Gilbert-cell type 4-quadrant multiplier is used, resulting in relatively good linearity, relatively low noise, and relatively low power consumption. Disclosed techniques provide programmability in gain for the mixer and a broadband frequency of operation. A non-linear feedback loop is wrapped around the circuit to stabilize the common-mode voltage shifts due to programming. In one embodiment, a non-linear switch as load-resistance is used to improve the linearity of the circuit.Type: GrantFiled: July 9, 2008Date of Patent: March 12, 2013Assignee: PMC-Sierra, Inc.Inventor: Vikas Choudhary
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Patent number: 7940088Abstract: Apparatus and methods detect missing clock edges. An improved phase frequency detector (PFD) can be used in, for example, a phase locked loop (PLL) or a delay locked loop (DLL). Conventional PFDs can miss clock edges. Disclosed is a missing clock edge detection circuit that reliably detects these missing clock edges to correctly activate switches of a charge pump of the PLL or DLL. Embodiments exhibit relatively little of the characteristic polarity reversal of conventional PLL or DLL circuits, which then enables embodiments to operate faster and acquire phase lock quicker than conventional circuits. Such techniques are useful in clock synthesis, clock recovery, and the like. The invention can further include an optional circuit that detects when the missing clock edge detection circuit may have inaccurately determined (false positive) that a clock edge had been missed, to override the corrective action by the missing clock edge detection circuit.Type: GrantFiled: March 31, 2009Date of Patent: May 10, 2011Assignee: PMC-Sierra, Inc.Inventors: Parthasarathy Sampath, Vikas Choudhary
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Patent number: 7898295Abstract: Apparatus and methods provide low voltage differential signaling (LVDS) driver with replica circuit biasing and protection for hot plugging. The replica biasing is non-intrusive in nature, and can control the voltage swing tightly over parametric variations. The absence of an explicit near-end driver termination improves efficiency, while replica biasing controls output voltage swing levels. Hot-pluggable compatibility is achieved by a reduction in power-off leakage current and short circuit current protection.Type: GrantFiled: March 19, 2009Date of Patent: March 1, 2011Assignee: PMC-Sierra, Inc.Inventors: Venkatesh Kasturirangan, Vikas Choudhary
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Patent number: 6782404Abstract: Over-sampled timing signal jitter tolerance is improved in a q-times over-sampled architecture by phase-sampling the timing signal to produce a plurality of input phase samples &phgr;in, where &phgr;in&egr;{&phgr;1, &phgr;2, . . . , &phgr;q}. An output phase value &phgr;out=&phgr;in is initialized for each input sample &phgr;in. A difference vector di is derived for each input sample &phgr;in, where di=Fj(n,k). F denotes a vector operation, n is the number of input samples, k is a pre-defined threshold value, and j represents a filter order value. A predefined scaling coefficient ai is applied to each difference vector di to produce a corresponding set of scaled difference vectors ai di. The scaled difference vectors are summed: d j = ∑ i = 1 n ⁢ a i ⁢ d i .Type: GrantFiled: June 27, 2001Date of Patent: August 24, 2004Assignee: PMC-Sierra Ltd.Inventor: Vikas Choudhary
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Publication number: 20030055854Abstract: Over-sampled timing signal jitter tolerance is improved in a q-times over-sampled architecture by phase-sampling the timing signal to produce a plurality of input phase samples &phgr;in, where &phgr;in&egr;{&phgr;1, &phgr;2, . . . , &phgr;q}. An output phase value &phgr;out=&phgr;in initialized for each input sample &phgr;in. A difference vector di is derived for each input sample &phgr;in, where di=Fj(n,k). F denotes a vector operation, n is the number of input samples, k is a pre-defined threshold value, and j represents a filter order value. A predefined scaling coefficient ai is applied to each difference vector di to produce a corresponding set of scaled difference vectors aidi. The scaled difference vectors are summed: 1 d j = ∑ i = 1 n ⁢ a i ⁢ d i .Type: ApplicationFiled: June 27, 2001Publication date: March 20, 2003Inventor: Vikas Choudhary