Patents by Inventor Vikas Garg
Vikas Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11714918Abstract: Systems, methods, and computer-readable media are disclosed for systems and methods for sending and receiving requests to delete and/or retrieve certain data. Example methods may include sending from an electronic device a request to delete and/or retrieve selected data from a server based on selected categories, receiving the request at the server, and determining data to delete and/or retrieve on the server based on the request from the electronic device, deleting and/or retrieving the data on the server, and/or sending the retrieved selected to the electronic device.Type: GrantFiled: March 4, 2020Date of Patent: August 1, 2023Assignee: Amazon Technologies, Inc.Inventors: Tegdeep Kondal, Apurv Singh, Vikas Garg, Hitansu Kumar Jena, Brijesh Madhabhai Meshiya, Mahesh Natrajan, Piyush Jain
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Publication number: 20230078484Abstract: Request definitions associated with respective actions of a workflow identify characteristics of objects utilized in performance of the respective action. Hypothetical in-flight changes that modify the characteristics are anticipated and implemented into the workflow. The actions within the workflow are subscribed to the hypothetical in-flight changes based upon the characteristics identified in the request definitions and modified by the in-flight changes by identifying which in-flight changes affect which workflow actions. Accordingly, when an in-flight is received, the workflow is automatically updated to account for the modifications to the characteristics made by the in-flight change. Specifically, actions that should be undone and/or redone in response to the modification to the characteristics are automatically identified and new tasks are created to undo and/or redo the identified actions.Type: ApplicationFiled: June 1, 2022Publication date: March 16, 2023Inventors: Jason Michael Occhialini, Sarath Ambati, Shilpa Janagam, Vikas Garg Kumar, Sapan Kumar Behera, Anshul Sharma, Sathiyan Seran, Ritwik Reddy Nallavelly
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Patent number: 11311370Abstract: Embodiments here provide a method of manufacturing including steps of determining a dimension of a three dimensional prosthesis wherein an external contour matches the three dimensional contour of the anatomical structure of the person and a three dimensional internal architecture is incorporated that includes of a plurality of void spaces separated by a plurality of internal walls wherein the three dimensional internal architecture is selected to match the first Young's modulus of elasticity specific to the anatomical structure of the person and the prosthesis is dispensed layer by layer using additive manufacturing technique. Filler material is chosen in filled in at least one of the plurality of void spaces separated by a plurality of internal walls. The desired elastic and mechanical properties close to natural anatomical structure of a person is achieved.Type: GrantFiled: March 16, 2019Date of Patent: April 26, 2022Assignee: PRAYASTA 3D INVENTIONS PVT LTDInventor: Vikas Garg
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Publication number: 20210267750Abstract: Embodiments here provide a method of manufacturing including steps of determining a dimension of a three dimensional prosthesis wherein an external contour matches the three dimensional contour of the anatomical structure of the person and a three dimensional internal architecture is incorporated that includes of a plurality of void spaces separated by a plurality of internal walls wherein the three dimensional internal architecture is selected to match the first Young's modulus of elasticity specific to the anatomical structure of the person and the prosthesis is dispensed layer by layer using additive manufacturing technique. Filler material is chosen in filled in at least one of the plurality of void spaces separated by a plurality of internal walls. The desired elastic and mechanical properties close to natural anatomical structure of a person is achieved.Type: ApplicationFiled: March 16, 2019Publication date: September 2, 2021Inventor: Vikas Garg
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Patent number: 11070440Abstract: A method implemented through a server of a cloud computing network including subscribers of application acceleration as a service provided therethrough includes sampling time series data associated with each network entity for each feature thereof into a smaller time interval as a first data series and a second data series including a maximum value and a minimum value respectively of the sampled time series data for the each feature within the smaller time interval, and generating a reference data band from predicted future data sets. The method also includes detecting, based on the reference data band, an anomaly in real-time data associated with the each network entity for the each feature thereof and determining an event associated with a pattern of change of the real-time data associated with the each network entity based on executing an optimization algorithm to determine a series of anomalies including the detected anomaly.Type: GrantFiled: October 23, 2019Date of Patent: July 20, 2021Assignee: ARYAKA NETWORKS, INC.Inventors: Parth Arvindbhai Patel, Vivek Padmanabhan, Johny Nainwani, Justin Joseph, Shyamtanu Majumder, Vikas Garg, Ashwath Nagaraj
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Publication number: 20210126836Abstract: A method implemented through a server of a cloud computing network including subscribers of application acceleration as a service provided therethrough includes sampling time series data associated with each network entity for each feature thereof into a smaller time interval as a first data series and a second data series including a maximum value and a minimum value respectively of the sampled time series data for the each feature within the smaller time interval, and generating a reference data band from predicted future data sets. The method also includes detecting, based on the reference data band, an anomaly in real-time data associated with the each network entity for the each feature thereof and determining an event associated with a pattern of change of the real-time data associated with the each network entity based on executing an optimization algorithm to determine a series of anomalies including the detected anomaly.Type: ApplicationFiled: October 23, 2019Publication date: April 29, 2021Inventors: Parth Arvindbhai Patel, Vivek Padmanabhan, Johny Nainwani, Justin Joseph, Shyamtanu Majumder, Vikas Garg, Ashwath Nagaraj
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Patent number: 10966059Abstract: A location tracking and distance monitoring system includes a plurality of portable transponders, each portable transponder having a wireless transmitter and configured to transmit location data, a location database storing the location data transmitted by the plurality of portable transponders, wherein each portable transponder is identified as a tag with co-ordinates in the location database, a distance monitoring module comprising at least one processor and configured via computer executable instructions to access the location data from the location database, define a coverage region with a coverage radius around each tag, determine overlapping zones of the coverage regions of the tags, and generate tag clusters based on the overlapping zones. Further, an associated method and computer readable medium are provided.Type: GrantFiled: July 16, 2020Date of Patent: March 30, 2021Assignee: Siemens Industry, Inc.Inventors: Mohit Dayal, Firas Khalil, Vikas Garg, Mark Egervari, Mohamad El Naamani, Clayton T. French, Artur Ottlik, Navneet Sharma, Malika Tandon
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Patent number: 9633959Abstract: An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint.Type: GrantFiled: February 11, 2015Date of Patent: April 25, 2017Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Shailesh Kumar, Vikas Garg, Meng Kong Lye
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Patent number: 9418873Abstract: A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.Type: GrantFiled: August 24, 2014Date of Patent: August 16, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Shailesh Kumar, Vikas Garg, Sumit Varshney, Chetan Verma
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Publication number: 20160233183Abstract: An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint.Type: ApplicationFiled: February 11, 2015Publication date: August 11, 2016Inventors: Shailesh Kumar, Vikas Garg, Meng Kong Lye
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Publication number: 20160163671Abstract: A surface-mounted integrated circuit package containing a semiconductor die has at least two conductive plates on its lower surface for contacting power and ground areas of a printed circuit board (PCB). The conductive plates are electrically connected to metal studs encapsulated within the package and which link the plates to the power and ground grids of the semiconductor die. Power and ground can thus be provided to the package with conductive patterns on the PCB that match with the plates. The resistance of the plates is low and hence the IR drop across the die is low. By supplying power directly to the package via the plates, the peripheral package pins that would otherwise have been allocated for power (and ground) are now freed up for signal assignment.Type: ApplicationFiled: December 3, 2014Publication date: June 9, 2016Applicant: Freescale Semiconductor, Inc.Inventors: SHAILESH KUMAR, Rishi Bhooshan, Chee Seng Foong, Vikas Garg, Navas Khan Oratti Kalandar, Chetan Verma
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Publication number: 20160086136Abstract: A method for dynamically scheduling an event between a first entity and a second entity based on an updated expected time is provided. The method includes (a) retrieving, a list of relevant second entities from a database of said second entities based on said at least one search criteria received from a device associated with said first entity, (b) allocating, an appointment with an initial expected time to said first entity from a available appointment times with at least one second entity from said list of relevant second entities on obtaining an appointment request from said first entity on an appointment screen specific to said second entity, (c) dynamically calculating, (i) a updated expected time of said appointment, or (ii) a current token, and (d) communicating said updated expected time of said appointment for display on said appointment screen at said device associated with said first entity.Type: ApplicationFiled: September 18, 2014Publication date: March 24, 2016Inventors: Sujay Parth Pidara, Madhusudan Garg, Vikas Garg
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Publication number: 20160056099Abstract: A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.Type: ApplicationFiled: August 24, 2014Publication date: February 25, 2016Applicant: Freescale Semiconductor, Inc.Inventors: Shailesh Kumar, Vikas Garg, Sumit Varshney, Chetan Verma
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Publication number: 20150364439Abstract: A semiconductor device uses insulated bond wires to connect peripheral power supply and ground bond pads on the periphery of the device to array power supply and ground bond pads located on an interior region of a integrated circuit die of the device. Power supply and ground voltages are conveyed from array bond pads using vertical vias down to one or more corresponding inner power distribution layers. The bond wire connections form rows and columns of hops constituting a mesh power grid that reduces the IR drop of the semiconductor device.Type: ApplicationFiled: June 12, 2014Publication date: December 17, 2015Applicant: Freescale Semiconductor, Inc.Inventors: Shailesh Kumar, Rishi Bhooshan, Vikas Garg, Chetan Verma, Navas Khan Oratti Kalandar
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Patent number: 9196598Abstract: A semiconductor device uses insulated bond wires to connect peripheral power supply and ground bond pads on the periphery of the device to array power supply and ground bond pads located on an interior region of a integrated circuit die of the device. Power supply and ground voltages are conveyed from array bond pads using vertical vias down to one or more corresponding inner power distribution layers. The bond wire connections form rows and columns of hops constituting a mesh power grid that reduces the IR drop of the semiconductor device.Type: GrantFiled: June 12, 2014Date of Patent: November 24, 2015Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Shailesh Kumar, Rishi Bhooshan, Vikas Garg, Chetan Verma, Navas Khan Oratti Kalandar
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Publication number: 20150221592Abstract: A decoupling capacitor (decap) for circuitry (e.g., an I/O interface) in a semiconductor die is formed using one or more pairs of (parallel) bond wires wire-bonded to bond pads on a top surface of the die. Depending on the implementation, the pairs of bond wires may be horizontally or vertically aligned and may be bonded to I/O and/or array bond pads.Type: ApplicationFiled: February 3, 2014Publication date: August 6, 2015Inventors: Chetan Verma, Rishi Bhooshan, Vikas Garg, Shailesh Kumar, Navas Khan Oratti Kalandar
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Publication number: 20150200868Abstract: A method and mechanism for a distributed on-demand computing system. The system automatically provisions distributed computing servers with customer application programs. The parameters of each customer application program are taken into account when a server is selected for hosting the program. The system monitors the status and performance of each distributed computing server. The system provisions additional servers when traffic levels exceed a predetermined level for a customer's application program and, as traffic demand decreases to a predetermined level, servers can be un-provisioned and returned back to a server pool for later provisioning. The system tries to fill up one server at a time with customer application programs before dispatching new requests to another server. The customer is charged a fee based on the usage of the distributed computing servers.Type: ApplicationFiled: November 19, 2014Publication date: July 16, 2015Applicant: Akamai Technologies, Inc.Inventors: Eric Sven-Johan Swildens, Richard David Day, Vikas Garg, Zaide Liu
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Patent number: 8909735Abstract: A method and mechanism for a distributed on-demand computing system. The system automatically provisions distributed computing servers with customer application programs. The parameters of each customer application program are taken into account when a server is selected for hosting the program. The system monitors the status and performance of each distributed computing server. The system provisions additional servers when traffic levels exceed a predetermined level for a customer's application program and, as traffic demand decreases to a predetermined level, servers can be un-provisioned and returned back to a server pool for later provisioning. The system tries to fill up one server at a time with customer application programs before dispatching new requests to another server. The customer is charged a fee based on the usage of the distributed computing servers.Type: GrantFiled: March 5, 2012Date of Patent: December 9, 2014Assignee: Akamai Technologies, Inc.Inventors: Eric Sven-Johan Swildens, Richard David Day, Vikas Garg, Zaide Edward Liu
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Patent number: 8832238Abstract: Techniques are described for recording stateless internet protocol (IP) addresses. A DHCP server may receive information requests and/or other communications from a stateless IPv6 client that can be employed to ascertain corresponding IP addresses generated by the client. In one approach, the DHCP server is configured to parse appropriate communications to find information indicative of a stateless IP address. This may include extracting a subnet prefix of the IPv6 client and an interface ID which identifies the specific network interface employed by the client for communications. The DHCP server uses this information to generate corresponding IP addresses. The DHCP server records the extracted information and/or generated addresses in its database (e.g., IP address event log). The DHCP server is then able to provide a count of clients and percentage utilization for a network using the recorded addressing information.Type: GrantFiled: September 12, 2011Date of Patent: September 9, 2014Assignee: Microsoft CorporationInventors: Vithalprasad J. Gaitonde, Mayur R. Naik, Vikas Garg, Pramit K. Bhuyan, Arun Ramamurthi
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Patent number: 8612413Abstract: A distributed data cache included in a content delivery network expedites retrieval of data for application execution by a server in a content delivery network. The distributed data cache is distributed across computer-readable storage media included in a plurality of servers in the content delivery network. When an application generates a query for data, a server in the content delivery network determines whether the distributed data cache includes data associated with the query. If data associated with the query is stored in the distributed data cache, the data is retrieved from the distributed data cache. If the distributed data cache does not include data associated with the query, the data is retrieved from a database and the query and associated data are stored in the distributed data cache to expedite subsequent retrieval of the data when the application issues the same query.Type: GrantFiled: August 12, 2010Date of Patent: December 17, 2013Assignee: CDNetworks Co., Ltd.Inventors: Arijit Ghosh, Vikas Garg