Abstract: A computer system identifies active nets in a netlist of a circuit design by performing simulation of the netlist. Active nets are interconnections between circuit components showing a level of activity during the simulation. The computer system extracts, from a layout of the circuit design, a parasitic netlist of a part of the circuit design, where the part determined by the active nets. The parasitic netlist is a list of parasitic nets, or unwanted circuit interconnections that are unavoidable adjuncts of the active nets. The computer system performs simulation of the circuit design including the netlist of a circuit design and the parasitic netlist of the part of the circuit design.

Abstract: A computer system identifies active nets in a netlist of a circuit design by performing simulation of the netlist. Active nets are interconnections between circuit components showing a level of activity during the simulation. The computer system extracts, from a layout of the circuit design, a parasitic netlist of a part of the circuit design, where the part determined by the active nets. The parasitic netlist is a list of parasitic nets, or unwanted circuit interconnections that are unavoidable adjuncts of the active nets. The computer system performs simulation of the circuit design including the netlist of a circuit design and the parasitic netlist of the part of the circuit design.

Abstract: A computer system identifies active nets in a netlist of a circuit design by performing simulation of the netlist. Active nets are interconnections between circuit components showing a level of activity during the simulation. The computer system extracts, from a layout of the circuit design, a parasitic netlist of a part of the circuit design, where the part determined by the active nets. The parasitic netlist is a list of parasitic nets, or unwanted circuit interconnections that are unavoidable adjuncts of the active nets. The computer system performs simulation of the circuit design including the netlist of a circuit design and the parasitic netlist of the part of the circuit design.

Abstract: In a circuit design method, a computer system identifies active nets in a netlist of a circuit design by performing simulation of the netlist. The computer system extracts, from a layout of the circuit design, a parasitic netlist of a limited part of the circuit design, where the limited part determined by the active nets. The computer system performs simulation of the circuit design including the netlist of a circuit design and the parasitic netlist of the limited part of the circuit design. In another method the computer system performs simulation of a circuit design including a netlist of the circuit design and a parasitic netlist of a limited part of the circuit design, where the limited part is determined by active nets of a netlist of the circuit design, and the parasitic netlist of the limited part of the circuit design is extracted from a layout of the circuit design. Other aspects are the computer system and a computer readable medium storing the computer instructions to execute the steps.