Abstract: Power efficiency can be optimized in a direct current (DC)-DC converter in discontinuous conduction mode (DCM) if a transition from a state of decreasing inductor current to a state of zero inductor current occurs as close as possible to the decreasing inductor current reaching zero. The timing of a zero current indication is affected by a voltage offset and a propagation delay of a comparator. A DC-DC converter, including a control circuit for accurate detection of zero inductor current, is disclosed. A control circuit calibrates an offset voltage for a load, stores a corresponding offset value, and in response to powering the load, provides an offset voltage to the comparator based on the stored offset value. In some examples, the control circuit determines an offset voltage and stores an offset value for each voltage and switch width combination. Using stored offset values increases accuracy of zero inductor current detection.

Abstract: The present disclosure describes a system-on-chip (SoC) including a built-in self-test (BIST) block, a low-dropout (LDO) voltage regulator with a pass metal-oxide-semiconductor field-effect transistor (MOSFET), and a current-monitor circuit with a sensing MOSFET, a tuning MOSFET, a sensing resistor, and a tuning resistor. Herein, both the pass MOSFET and the sensing MOSFET receive an input voltage, and a gate of the pass MOSFET is coupled to a gate of the sensing MOSFET. The sensing MOSFET, the tuning MOSFET, and the sensing resistor are connected in series between the input voltage and ground, and the tuning resistor is coupled between a gate of the tuning MOSFET and ground. The BIST block is configured to tune a current through the tuning resistor so as to adjust a voltage at a connection point of the sensing MOSFET and the tuning MOSFET.