Abstract: A method and system for securely routing traffic in a computing environment via a firewall, the method including configuring a reverse proxy server via a first configuration file and configuring a DNS server via a second configuration file, and routing traffic via the reverse proxy server by looking up addresses in the DNS server. The first configuration file includes a plurality of target IP addresses, each of the plurality of target IP addresses referencing a DNS record in the DNS server and the second configuration file includes a plurality of DNS records, where each of the DNS records is initially set to point to a default IP address. When it is determined that there is a change to an IP address of a resource in the computing environment, the DNS record associated with the resource in the DNS server is automatically updated via an API call to the DNS server by replacing the default IP address with the updated IP address for the resource.

Abstract: A method and system for securely routing traffic in a computing environment via a firewall, the method including configuring a reverse proxy server via a first configuration file and configuring a DNS server via a second configuration file, and routing traffic via the reverse proxy server by looking up addresses in the DNS server. The first configuration file includes a plurality of target IP addresses, each of the plurality of target IP addresses referencing a DNS record in the DNS server and the second configuration file includes a plurality of DNS records, where each of the DNS records is initially set to point to a default IP address. When it is determined that there is a change to an IP address of a resource in the computing environment, the DNS record associated with the resource in the DNS server is automatically updated via an API call to the DNS server by replacing the default IP address with the updated IP address for the resource.

Abstract: Systems and techniques for an heterogeneous clock management solution for industrial systems are described herein. In an example, a system includes a clock management circuit adapted to receive core timing information from a core of an integrated circuit. The clock management circuit is further adapted to correlate the core timing information with a reference clock. The clock management circuit is further adapted to output frequency and time offset of the reference clock to the core timing information. The system includes an execution circuit adapted to schedule a transaction from the core at a scheduled time relative to the reference clock using the frequency and time offset. The execution circuit is further adapted to issue a command to execute the transaction at the scheduled time.

Abstract: Methods, systems, apparatus, and articles of manufacture to extend the life of embedded processors are disclosed herein. Disclosed example apparatus include a policy selector to select a policy, based on input information. The apparatus extends an operating lifespan of a microprocessor having a plurality of cores. The apparatus also includes a cores partitioner to divide, based on the selected policy, the plurality of cores into subsets of cores, including a first subset and a second subset. A sensor monitors, based on the selected policy, at least one operational parameter of the cores, and a cores switcher switches a first core of the first subset of cores from active to inactive and to switch a second core of the second subset of cores from inactive to active based on the at least one operational parameter. The switches reduce an amount of degradation experienced by the first core and the second core.

Abstract: Methods, systems, apparatus, and articles of manufacture to extend the life of embedded processors are disclosed herein. Disclosed example apparatus include a policy selector to select a policy, based on input information. The apparatus extends an operating lifespan of a microprocessor having a plurality of cores. The apparatus also includes a cores partitioner to divide, based on the selected policy, the plurality of cores into subsets of cores, including a first subset and a second subset. A sensor monitors, based on the selected policy, at least one operational parameter of the cores, and a cores switcher switches a first core of the first subset of cores from active to inactive and to switch a second core of the second subset of cores from inactive to active based on the at least one operational parameter. The switches reduce an amount of degradation experienced by the first core and the second core.

Abstract: Various systems and methods for implementing time-aware general-purpose input output (TGPIO) for industrial control systems are described herein. A system includes edge detector circuitry to: detect rising or falling edges in an input signal; and store the rising or falling edges in a buffer along with a corresponding timestamp of the respective edge; and pattern match circuitry to: analyze the rising or falling edges in the buffer to identify a pattern of edges that matches a search pattern; and store timestamps corresponding to the pattern of edges in an event queue, the event queue used to notify a user application of the existence of the pattern of edges in the input signal.

Abstract: Systems and techniques for an heterogeneous clock management solution for industrial systems are described herein. In an example, a system includes a clock management circuit adapted to receive core timing information from a core of an integrated circuit. The clock management circuit is further adapted to correlate the core timing information with a reference clock. The clock management circuit is further adapted to output frequency and time offset of the reference clock to the core timing information. The system includes an execution circuit adapted to schedule a transaction from the core at a scheduled time relative to the reference clock using the frequency and time offset. The execution circuit is further adapted to issue a command to execute the transaction at the scheduled time.