Patents by Inventor Vikram Karnani

Vikram Karnani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060217101
    Abstract: Transmission of a high frequency signal is provided by a passive mixer. The passive mixer receives a low frequency signal as an input. The passive mixer includes a plurality of transistors each with a gate, a source, and a drain. The passive mixer also includes a local oscillator connected to the gates of the transistors. The gates of the transistors are also connected to a DC bias proportional to the threshold voltage of the transistors. In addition, an output of the passive mixer may be attenuated by a passive attenuator wherein both the passive attenuator and passive mixer are substantially free of quiescent current.
    Type: Application
    Filed: March 22, 2005
    Publication date: September 28, 2006
    Inventors: Lawrence Connell, David Kovac, Poojan Wagh, Vikram Karnani, William Waldie, Tao Wu
  • Publication number: 20030092419
    Abstract: A near-unity divider apparatus in a direct conversion communication device includes a reference frequency, that is not on-channel, input to a multiply-by-two circuit that doubles the reference frequency. A divide-by-three circuit divides the doubled frequency by three to provide a first fractionally-divided frequency at a transmit or receive frequency. A delay generator inputs the first fractionally-divided frequency from the divide-by-three circuit and provides a second fractionally-divided frequency delayed a predetermined time period. A gate circuit combines the first and second fractionally-divided frequencies to provide a transmit or receive frequency with an adjustable duty cycle dependant upon the predetermined time period.
    Type: Application
    Filed: November 9, 2001
    Publication date: May 15, 2003
    Inventors: Dan Nobbe, Vikram Karnani
  • Patent number: 6487398
    Abstract: A low noise direct conversion transmitter architecture without a post-PA filter is described. A high power/low noise differential LO (110), controlled by a near unity divide ratio PLL (112) for re-modulation protection, is coupled a polyphase quadrature generator (120) generating amplitude-balanced and phase-shifted limited differential LO signals. The quadrature mixers (130 and 132) receive the limited differential LO signals and the filtered differential baseband signals to produce up-converted differential signals. The combiner (168) receives the up-converted differential signals and combines them to produce a differential RF transmission signal. A VCA (174) amplifies the differential RF transmission signal, and the resulting differential signal is converted to a single-ended RF transmission signal through a balun (180). A linear amplifier (184) is coupled to the single-ended RF transmission signal for amplification before radio transmission by an antenna (188).
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: November 26, 2002
    Assignee: Motorola, Inc.
    Inventors: Dan Nobbe, Dale Schwent, David P. Kovac, Vikram Karnani