Patents by Inventor Vikram Khosa

Vikram Khosa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8635411
    Abstract: An interconnect having a plurality of interconnect nodes arranged to provide at least one ring, a plurality of caching nodes for caching data coupled into the interconnect via an associated one of said interconnect nodes, and at least one coherency management node for implementing a coherency protocol to manage coherency of the data cached by each of said caching nodes. Each coherency management node being coupled into the interconnect via an associated one of said interconnect nodes. When each caching node produces a snoop response for said snoop request, the associated interconnect node is configured to output that snoop response in one of said at least one identified slots. Further, each interconnect node associated with a caching node has merging circuitry configured, when outputting the snoop response in an identified slot, to merge that snoop response with any current snoop response information held in that slot.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: January 21, 2014
    Assignee: ARM Limited
    Inventors: William Henry Flanders, Vikram Khosa
  • Publication number: 20130024629
    Abstract: An interconnect having a plurality of interconnect nodes arranged to provide at least one ring, a plurality of caching nodes for caching data coupled into the interconnect via an associated one of said interconnect nodes, and at least one coherency management node for implementing a coherency protocol to manage coherency of the data cached by each of said caching nodes. Each coherency management node being coupled into the interconnect via an associated one of said interconnect nodes. When each caching node produces a snoop response for said snoop request, the associated interconnect node is configured to output that snoop response in one of said at least one identified slots. Further, each interconnect node associated with a caching node has merging circuitry configured, when outputting the snoop response in an identified slot, to merge that snoop response with any current snoop response information held in that slot.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 24, 2013
    Inventors: William Henry Flanders, Vikram Khosa