Patents by Inventor Vikram Patil
Vikram Patil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220391427Abstract: An apparatus for use in a communication system sets, in a search request serving to retrieve, from a storage entity, records that match filters, an indication which indicates if, for one or more matching records of the records that match the filters, a content of the one or more matching records is to be received in a response to the search request along with references to the records that match the filters, and transmits the search request including the indication.Type: ApplicationFiled: June 3, 2022Publication date: December 8, 2022Inventors: Jonathan LITTLE, Ioannis MOUROULIS, Ulrich WIEHE, Vikram PATIL
-
Patent number: 10748395Abstract: A tracker apparatus, and method for tracking deployable units. The tracker apparatus includes a first sensor group having a first power consumption profile; a second sensor group having a second power consumption profile; a communication circuit having a first network interface for communicating with a control server; an energy storage; a processing circuitry; and a memory, wherein the memory includes instructions that, when executed by the processing circuitry, configure the tracker apparatus to: trigger the processing circuitry to awaken from a low power mode in response to a first input from a first sensor of the first sensor group exceeding a first threshold; activate a second sensor of the second sensor group in response to the first input corresponding to an unauthorized movement; and activate a tracking mode of the tracker apparatus, in response to a second input from the second sensor corresponding to an unauthorized movement.Type: GrantFiled: July 16, 2019Date of Patent: August 18, 2020Assignees: Vivek KangralkarInventors: Vivek Kangralkar, Vikram Patil
-
Patent number: 10511285Abstract: An apparatus comprises a device substrate having an upper surface. An anchor opening exists in the device substrate. The apparatus also comprises a lid layer disposed over the upper surface of a frame layer. The lid layer and the frame layer each comprise a photodefinable polymer material. The apparatus also comprises a compartment in the frame layer. The lid layer provides a cover for the compartment, and a portion of the frame layer is disposed in the anchor opening.Type: GrantFiled: September 29, 2017Date of Patent: December 17, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventor: Vikram Patil
-
Publication number: 20190340901Abstract: A tracker apparatus, and method for tracking deployable units. The tracker apparatus includes a first sensor group having a first power consumption profile; a second sensor group having a second power consumption profile; a communication circuit having a first network interface for communicating with a control server; an energy storage; a processing circuitry; and a memory, wherein the memory includes instructions that, when executed by the processing circuitry, configure the tracker apparatus to: trigger the processing circuitry to awaken from a low power mode in response to a first input from a first sensor of the first sensor group exceeding a first threshold; activate a second sensor of the second sensor group in response to the first input corresponding to an unauthorized movement; and activate a tracking mode of the tracker apparatus, in response to a second input from the second sensor corresponding to an unauthorized movement.Type: ApplicationFiled: July 16, 2019Publication date: November 7, 2019Inventors: Vivek KANGRALKAR, Vikram PATIL
-
Patent number: 10403104Abstract: A tracker apparatus, and method thereof for tracking deployable units are provided. The tracker apparatus includes a first sensor group having a first power consumption profile; a second sensor group having a second power consumption profile; a communication circuit having a first network interface for communicating with a control server; an energy storage; a processing circuitry; and a memory, wherein the memory includes instructions that, when executed by the processing circuitry, configure the tracker apparatus to: trigger the processing circuitry to awaken from a low power mode, in response to a first input from a first sensor of the first sensor group exceeding a first threshold; activate a second sensor of the second sensor group in response to the first input corresponding to an unauthorized movement; and activate a tracking mode of the tracker apparatus, in response to a second input from the second sensor corresponding to an unauthorized movement.Type: GrantFiled: August 23, 2018Date of Patent: September 3, 2019Inventors: Vivek Kangralkar, Vikram Patil
-
Publication number: 20190123716Abstract: An apparatus includes: a substrate; a lid disposed over the substrate, and comprising posts disposed around a perimeter of the substrate, the posts enclosing a cavity between the lid and the substrate; an electronic device disposed over an upper surface of the substrate, and in the cavity; an electrical contact pad; and an electrically insulating layer disposed between the electrical contact pad and an upper surface of the lid.Type: ApplicationFiled: October 24, 2017Publication date: April 25, 2019Inventors: Steven Martin, Andrew Barfknecht, Nathan Perkins, Vikram Patil
-
Patent number: 10263587Abstract: A packaged resonator includes a substrate, an acoustic stack, a first polymer layer and a second polymer layer. The acoustic stack is disposed over the substrate. The first polymer layer is disposed over the substrate surrounding the acoustic stack. The first polymer layer also provides a first air gap above the acoustic stack. The second polymer layer is disposed over the acoustic stack and above the first air gap.Type: GrantFiled: February 28, 2017Date of Patent: April 16, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Vikram Patil, John Choy
-
Publication number: 20190057586Abstract: A tracker apparatus, and method thereof for tracking deployable units are provided. The tracker apparatus includes a first sensor group having a first power consumption profile; a second sensor group having a second power consumption profile; a communication circuit having a first network interface for communicating with a control server; an energy storage; a processing circuity; and a memory, wherein the memory includes instructions that, when executed by the processing circuity, configure the tracker apparatus to: trigger the processing circuity to awaken from a low power mode, in response to a first input from a first sensor of the first sensor group exceeding a first threshold; activate a second sensor of the second sensor group in response to the first input corresponding to an unauthorized movement; and activate a tracking mode of the tracker apparatus, in response to a second input from the second sensor corresponding to an unauthorized movement.Type: ApplicationFiled: August 23, 2018Publication date: February 21, 2019Applicant: BeetleQ Inc.Inventors: Vivek KANGRALKAR, Vikram PATIL
-
Publication number: 20180183406Abstract: A packaged resonator includes a substrate, an acoustic stack, a first polymer layer and a second polymer layer. The acoustic stack is disposed over the substrate. The first polymer layer is disposed over the substrate surrounding the acoustic stack. The first polymer layer also provides a first air gap above the acoustic stack. The second polymer layer is disposed over the acoustic stack and above the first air gap.Type: ApplicationFiled: February 28, 2017Publication date: June 28, 2018Inventors: Vikram Patil, John Choy
-
Patent number: 9573814Abstract: A method of high-throughput printing and selective transfer of graphene onto a substrate includes the steps of: providing a thermal release tape having graphene adhered thereto; placing a substrate onto the graphene; pressing the thermal tape and the graphene against the substrate at a uniformly-distributed pressure; heating localized portions of the thermal tape and graphene using a localized heat source, thereby diminishing the adhesive properties of the thermal release tape in the localized portions and transferring graphene from said localized portions to the substrate; and separating the thermal release tape from the substrate. The method may include the further step of moving the localized heat source to selected positions on the thermal release tape during the heating step, thereby forming a pattern of heated portions. The method may use a laser beam as the localized heat source, movement of the laser beam being performed by a computer-controlled deflectable mirror.Type: GrantFiled: February 20, 2014Date of Patent: February 21, 2017Assignee: The Trustees of the Stevens Institute of TechnologyInventors: Vikram Patil, Youn-Su Kim, Kitu Kumar, Eui-Hyeok Yang
-
Patent number: 9330874Abstract: A method for forming a cavity in a microfabricated structure, includes the sealing of that cavity with a low temperature solder. The method may include forming a sacrificial layer over a substrate, forming a flexible membrane over the sacrificial layer, forming a release hole through a flexible membrane to the sacrificial layer, introducing an etchant through the release hole to remove the sacrificial layer, and then sealing that release hole with a low temperature solder.Type: GrantFiled: August 11, 2014Date of Patent: May 3, 2016Assignee: Innovative Micro TechnologyInventors: Benedikt Zeyen, Vikram Patil
-
Publication number: 20160042902Abstract: A method for forming a cavity in a microfabricated structure, includes the sealing of that cavity with a low temperature solder. The method may include forming a sacrificial layer over a substrate, forming a flexible membrane over the sacrificial layer, forming a release hole through a flexible membrane to the sacrificial layer, introducing an etchant through the release hole to remove the sacrificial layer, and then sealing that release hole with a low temperature solder.Type: ApplicationFiled: August 11, 2014Publication date: February 11, 2016Inventors: Benedikt ZEYEN, Vikram PATIL
-
Patent number: 8932673Abstract: A method for fabricating large-area, high-quality Graphene product. Specifically, the fabrication method uses a seed layer of exfoliated Graphene in combination with a substrate and a catalyst metal layer and introduces Carbon atoms to the Graphene seed, causing growth of high-quality Graphene product. The method of the invention combines some steps of current mechanical exfoliation techniques with other steps of the CVD process and adds a new technique to the fabrication method involving seed-based catalyst of large-area Graphene product growth.Type: GrantFiled: April 26, 2012Date of Patent: January 13, 2015Inventor: Vikram Patil
-
Publication number: 20140231002Abstract: A method of high-throughput printing and selective transfer of graphene onto a substrate includes the steps of: providing a thermal release tape having graphene adhered thereto; placing a substrate onto the graphene; pressing the thermal tape and the graphene against the substrate at a uniformly-distributed pressure; heating localized portions of the thermal tape and graphene using a localized heat source, thereby diminishing the adhesive properties of the thermal release tape in the localized portions and transferring graphene from said localized portions to the substrate; and separating the thermal release tape from the substrate. The method may include the further step of moving the localized heat source to selected positions on the thermal release tape during the heating step, thereby forming a pattern of heated portions. The method may use a laser beam as the localized heat source, movement of the laser beam being performed by a computer-controlled deflectable mirror.Type: ApplicationFiled: February 20, 2014Publication date: August 21, 2014Applicant: THE TRUSTEES OF THE STEVENS INSTITUTE OF TECHNOLOGYInventors: Vikram Patil, Youn-Su Kim, Kitu Kumar, Eui-Hyeok Yang
-
Publication number: 20130287956Abstract: A method for fabricating large-area, high-quality Graphene product. Specifically, the fabrication method uses a seed layer of exfoliated Graphene in combination with a substrate and a catalyst metal layer and introduces Carbon atoms to the Graphene seed, causing growth of high-quality Graphene product. The method of the invention combines some steps of current mechanical exfoliation techniques with other steps of the CVD process and adds a new technique to the fabrication method involving seed-based catalyst of large-area Graphene product growth.Type: ApplicationFiled: April 26, 2012Publication date: October 31, 2013Inventor: Vikram Patil
-
Patent number: 8497759Abstract: The RTD device of the present invention is comprised of a semiconductor substrate and a substantially thin conductive metal layer disposed upon the semiconductor substrate, wherein the conductive metal has a substantially linear temperature-resistance relationship. The conductive layer is etched into a convoluted RTD pattern, which consequently increases the overall resistance and minimizes the overall mass of the RTD assembly. A contact glass cover and a conductive metal-glass frit are placed over the RTD assembly to hermetically seal the RTD. The resultant structure can be “upside-down” mounted onto a header or a flat shim so that the bottom surface of the semiconductor substrate is exposed to the external environment, thus shielding the RTD from external forces. The resultant structure is a low mass, highly conductive, leadless, and hermetically sealed RTD that accurately measures the temperature of liquids and gases and maintains fast response time in high temperatures and harsh environments.Type: GrantFiled: March 25, 2010Date of Patent: July 30, 2013Assignee: Kulite Semiconductor Products, Inc.Inventors: Alexander Ned, Vikram Patil, Joseph VanDeWeert, Nora Kurtz
-
Publication number: 20110235678Abstract: The RTD device of the present invention is comprised of a semiconductor substrate and a substantially thin conductive metal layer disposed upon the semiconductor substrate, wherein the conductive metal has a substantially linear temperature-resistance relationship. The conductive layer is etched into a convoluted RTD pattern, which consequently increases the overall resistance and minimizes the overall mass of the RTD assembly. A contact glass cover and a conductive metal-glass frit are placed over the RTD assembly to hermetically seal the RTD. The resultant structure can be “upside-down” mounted onto a header or a flat shim so that the bottom surface of the semiconductor substrate is exposed to the external environment, thus shielding the RTD from external forces. The resultant structure is a low mass, highly conductive, leadless, and hermetically sealed RTD that accurately measures the temperature of liquids and gases and maintains fast response time in high temperatures and harsh environments.Type: ApplicationFiled: March 25, 2010Publication date: September 29, 2011Applicant: Kulite Semiconductor Products, Inc.Inventors: Anthony D. Kurtz, Nora Kurtz, Alex Ned, Vikram Patil, Joseph VanDeWeert