Patents by Inventor Vikramjit Sethi
Vikramjit Sethi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230409492Abstract: A method, apparatus, and system for storing memory encryption realm key IDs is disclosed. A method comprises accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address, accessing a key ID association structure with the realm ID to determine a realm key IS associated with the realm ID, and initiating a memory transaction based on the realm key ID. Once retrieved, the realm key ID may be stored in a translation lookaside buffer.Type: ApplicationFiled: August 28, 2023Publication date: December 21, 2023Inventors: Darren Lasko, Roberto Avanzi, Thomas Philip Speier, Harb Abdulhamid, Vikramjit Sethi
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Patent number: 11789874Abstract: A method, apparatus, and system for storing memory encryption realm key IDs is disclosed. A method comprises accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address, accessing a key ID association structure with the realm ID to determine a realm key IS associated with the realm ID, and initiating a memory transaction based on the realm key ID. Once retrieved, the realm key ID may be stored in a translation lookaside buffer.Type: GrantFiled: August 21, 2019Date of Patent: October 17, 2023Assignee: QUALCOMM IncorporatedInventors: Darren Lasko, Roberto Avanzi, Thomas Philip Speier, Harb Abdulhamid, Vikramjit Sethi
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Patent number: 11055082Abstract: A method and technique for updating firmware on a multi-protocol network adapter includes reading parameter values for a firmware update of a multi-protocol network adapter that specify classes of behavior for conducting the firmware update of the multi-protocol network adapter. An update tool determines a reset type defining a type of reset needed to activate the firmware update on the network adapter based on the parameter values, sends a message to the network adapter indicating that a firmware update process is beginning, sends a write request to the network adapter to write the firmware update to select communication protocol functions, and sends a reset request to select communication protocol functions to activate the firmware update using the reset type according to the parameter values.Type: GrantFiled: September 24, 2018Date of Patent: July 6, 2021Assignee: International Business Machines CorporationInventors: Tai-chien D. Chang, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Jaime F. Nualart, Vikramjit Sethi
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Patent number: 10678690Abstract: Providing fine-grained Quality of Service (QoS) control using interpolation for partitioned resources in processor-based systems is disclosed. In this regard, in one aspect, a processor-based system provides a partitioned resource (such as a system cache or memory access bandwidth to a shared system memory) that is subdivided into a plurality of partitions, and that is configured to service a plurality of resource clients. A resource allocation agent of the processor-based system provides a plurality of allocation indicators corresponding to each combination of resource client and partition, and indicating an allocation of each partition for each resource client. The resource allocation agent allocates the partitioned resource among the resource clients based on an interpolation of the plurality of allocation indicators.Type: GrantFiled: August 29, 2017Date of Patent: June 9, 2020Assignee: QUALCOMM IncorporatedInventors: Derek Robert Hower, Carl Alan Waldspurger, Vikramjit Sethi
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Publication number: 20190384725Abstract: A method, apparatus, and system for storing memory encryption realm key IDs is disclosed. A method comprises accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address, accessing a key ID association structure with the realm ID to determine a realm key IS associated with the realm ID, and initiating a memory transaction based on the realm key ID. Once retrieved, the realm key ID may be stored in a translation lookaside buffer.Type: ApplicationFiled: August 21, 2019Publication date: December 19, 2019Inventors: Darren LASKO, Roberto AVANZI, Thomas Philip SPEIER, Harb ABDULHAMID, Vikramjit SETHI
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Publication number: 20190215160Abstract: Embodiments of the disclosure include systems and methods for storage of a first plurality of cryptographic keys associated with a first plurality of corresponding Protected Software Environments (PSEs) supervised by a PSE-management software running on a computer system and configured to supervise a superset of the plurality of PSEs. The computer system stores currently unused keys of the superset in a relatively cheap, large, and slow memory and caches the keys of the first plurality in a relatively fast, small, and expensive memory. In one embodiment, in a computer system having a first processor, a first memory controller, and a first RAM, the first memory controller has a memory cryptography circuit connected between the first processor and the first RAM, the memory cryptography circuit has a keystore and a first cryptographic engine, and the keystore is configured to store a first plurality of cryptographic keys accessible by a cryptographic-key identification.Type: ApplicationFiled: January 9, 2018Publication date: July 11, 2019Inventors: Darren LASKO, Roberto Avanzi, Thomas Speier, Harb Abdulhamid, Vikramjit Sethi
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Publication number: 20190065374Abstract: Providing fine-grained Quality of Service (QoS) control using interpolation for partitioned resources in processor-based systems is disclosed. In this regard, in one aspect, a processor-based system provides a partitioned resource (such as a system cache or memory access bandwidth to a shared system memory) that is subdivided into a plurality of partitions, and that is configured to service a plurality of resource clients. A resource allocation agent of the processor-based system provides a plurality of allocation indicators corresponding to each combination of resource client and partition, and indicating an allocation of each partition for each resource client. The resource allocation agent allocates the partitioned resource among the resource clients based on an interpolation of the plurality of allocation indicators.Type: ApplicationFiled: August 29, 2017Publication date: February 28, 2019Inventors: Derek Robert Hower, Carl Alan Waldspurger, Vikramjit Sethi
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Publication number: 20190026100Abstract: A method and technique for updating firmware on a multi-protocol network adapter includes reading parameter values for a firmware update of a multi-protocol network adapter that specify classes of behavior for conducting the firmware update of the multi-protocol network adapter. An update tool determines a reset type defining a type of reset needed to activate the firmware update on the network adapter based on the parameter values, sends a message to the network adapter indicating that a firmware update process is beginning, sends a write request to the network adapter to write the firmware update to select communication protocol functions, and sends a reset request to select communication protocol functions to activate the firmware update using the reset type according to the parameter values.Type: ApplicationFiled: September 24, 2018Publication date: January 24, 2019Inventors: Tai-chien D. Chang, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Jaime F. Nualart, Vikramjit Sethi
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Patent number: 10095502Abstract: A method and technique for updating firmware on a multi-protocol network adapter includes: reading parameter values for a firmware update to determine an update scope indicating one or more functions of the network adapter affected by the firmware update and a write scope indicating which of the one or more functions should receive a write request for writing the firmware update to the network adapter. The update tool is operable to: send a message indicating to the one or more functions based on the update scope that a firmware update process is beginning; send a write request to write the firmware update to the one or more functions based on the write scope; send a reset request to reset the one or more functions to activate the firmware update; and send a message indicating to the one or more functions that the firmware update process is completed.Type: GrantFiled: March 9, 2016Date of Patent: October 9, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tai-chien D. Chang, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Jaime F. Nualart, Vikramjit Sethi
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Patent number: 9552324Abstract: An approach is provided that collects data from a multi-function adapter that is used by multiple functions. In the approach, a master function is dynamically selected from the group of functions. The approach further allows the master function to perform a disruptive adapter data collection while inhibiting performance of disruptive adapter data collection processes by the other (non-master) functions.Type: GrantFiled: August 14, 2015Date of Patent: January 24, 2017Assignee: International Business Machines CorporationInventors: Omar Cardona, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Vikramjit Sethi
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Patent number: 9514087Abstract: An approach is provided that collects data from a multi-function adapter that is used by multiple functions. In the approach, a master function is dynamically selected from the group of functions. The approach further allows the master function to perform a disruptive adapter data collection while inhibiting performance of disruptive adapter data collection processes by the other (non-master) functions.Type: GrantFiled: November 6, 2013Date of Patent: December 6, 2016Assignee: International Business Machines CorporationInventors: Omar Cardona, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Vikramjit Sethi
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Patent number: 9442812Abstract: Mechanisms, in a data processing system comprising a first adapter and second adapter, for performing a failover operation from the first adapter to the second adapter are provided. The mechanisms detect that an imminent failure of the first adapter is likely to occur and initiate a failover priming operation in the first adapter and second adapter in response to detecting the imminent failure. The failover priming operation configures ingress and egress buffers of the second adapter to have a similar configuration to ingress and egress buffers of the first adapter. The mechanisms migrate processing of ingress data traffic to the second adapter prior to failure of the first adapter such that the first adapter processes egress data traffic from the data processing system and the second adapter processes ingress data traffic to the data processing system.Type: GrantFiled: June 13, 2014Date of Patent: September 13, 2016Assignee: International Business Machines CorporationInventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi
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Publication number: 20160188320Abstract: A method and technique for updating firmware on a multi-protocol network adapter includes: reading parameter values for a firmware update to determine an update scope indicating one or more functions of the network adapter affected by the firmware update and a write scope indicating which of the one or more functions should receive a write request for writing the firmware update to the network adapter. The update tool is operable to: send a message indicating to the one or more functions based on the update scope that a firmware update process is beginning; send a write request to write the firmware update to the one or more functions based on the write scope; send a reset request to reset the one or more functions to activate the firmware update; and send a message indicating to the one or more functions that the firmware update process is completed.Type: ApplicationFiled: March 9, 2016Publication date: June 30, 2016Inventors: Tai-chien D. Chang, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Jaime F. Nualart, Vikramjit Sethi
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Patent number: 9317356Abstract: Mechanisms are provided for generating a system dump data structure based on device state data. A system dump operation is initialized in a data processing system and a device dump is requested by a dump manager from a device coupled to the data processing system. A collection scope data structure and disruption vector corresponding to the device are retrieved. The collection scope data structure specifies a set of one or more functions in the device for which to collect state data. The disruption vector specifies, for each of the one or more functions, a corresponding level of disruption that will be caused by the device dump. The device dump data is collected from the device in accordance with the collection scope data structure and the disruption vector and the system dump data structure is generated based on the collected device dump data.Type: GrantFiled: October 15, 2013Date of Patent: April 19, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Omar Cardona, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Vikramjit Sethi
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Patent number: 9298446Abstract: A method and technique for updating firmware on a multi-protocol network adapter includes: reading parameter values for a firmware update to determine an update scope indicating one or more functions of the network adapter affected by the firmware update and a write scope indicating which of the one or more functions should receive a write request for writing the firmware update to the network adapter. The update tool is operable to: send a message indicating to the one or more functions based on the update scope that a firmware update process is beginning; send a write request to write the firmware update to the one or more functions based on the write scope; send a reset request to reset the one or more functions to activate the firmware update; and send a message indicating to the one or more functions that the firmware update process is completed.Type: GrantFiled: October 28, 2013Date of Patent: March 29, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tai-chien D. Chang, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Jaime F. Nualart, Vikramjit Sethi
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Patent number: 9286171Abstract: Mechanisms, in a data processing system comprising a first adapter and second adapter, for performing a failover operation from the first adapter to the second adapter are provided. The mechanisms detect that an imminent failure of the first adapter is likely to occur and initiate a failover priming operation in the first adapter and second adapter in response to detecting the imminent failure. The failover priming operation configures ingress and egress buffers of the second adapter to have a similar configuration to ingress and egress buffers of the first adapter. The mechanisms migrate processing of ingress data traffic to the second adapter prior to failure of the first adapter such that the first adapter processes egress data traffic from the data processing system and the second adapter processes ingress data traffic to the data processing system.Type: GrantFiled: December 12, 2013Date of Patent: March 15, 2016Assignee: International Business Machines CorporationInventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi
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Patent number: 9262625Abstract: Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator.Type: GrantFiled: September 30, 2014Date of Patent: February 16, 2016Assignee: International Business Machines CorporationInventors: Frank Haverkamp, Christian Jacobi, Scot H. Rider, Vikramjit Sethi, Randal C. Swanberg, Joerg-Stephan Vogt
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Patent number: 9256729Abstract: Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator.Type: GrantFiled: June 20, 2013Date of Patent: February 9, 2016Assignee: International Business Machines CorporationInventors: Frank Haverkamp, Christian Jacobi, Scot H. Rider, Vikramjit Sethi, Randal C. Swanberg, Joerg-Stephan Vogt
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Patent number: 9229891Abstract: In response to receiving a request for a DMA data transfer, a DMA transfer mode may be determined based on based on the size of the requested DMA data transfer and profile data of an I/O adapter. The profile data for the I/O adapter may include a physical location of the I/O adapter or a number of clients supported by the I/O adapter. The DMA transfer mode may also be determined based on a preference of an application or an I/O device. Moreover, the DMA transfer mode may be determined based on a CPU usage metric being outside of a threshold for the CPU usage metric or on a memory usage metric being outside of a threshold for the memory usage metric.Type: GrantFiled: January 13, 2014Date of Patent: January 5, 2016Assignee: International Business Machines CorporationInventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi
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Publication number: 20150347347Abstract: An approach is provided that collects data from a multi-function adapter that is used by multiple functions. In the approach, a master function is dynamically selected from the group of functions. The approach further allows the master function to perform a disruptive adapter data collection while inhibiting performance of disruptive adapter data collection processes by the other (non-master) functions.Type: ApplicationFiled: August 14, 2015Publication date: December 3, 2015Inventors: Omar Cardona, Baltazar De Leon, III, Marcus B. Grande, Brian W. Hart, Vikramjit Sethi