Patents by Inventor Viktor Khomenko

Viktor Khomenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260030427
    Abstract: A computer-implemented method for generating a circuit design for an asynchronous circuit having an asynchronous finite state machine circuit is provided. The method includes receiving a first data file having state transition data that describes an asynchronous finite state machine. The method further includes generating, from the state transition data, a plurality of state data packages and one or more transition data packages. Each state data package is representative of a state of the asynchronous finite state machine. Each transition data package is representative of a transition between two states of the asynchronous finite state machine. The method further includes generating a second data file having circuit design data for the asynchronous circuit, thereby generating the circuit design for the asynchronous circuit.
    Type: Application
    Filed: July 24, 2024
    Publication date: January 29, 2026
    Applicant: Renesas Design (UK) Limited
    Inventors: Viktor KHOMENKO, Marco SAUTTO, Danil SOKOLOV
  • Patent number: 10839126
    Abstract: A method of selecting relative timing constraints for enforcing in an asynchronous circuit is presented. The method includes selecting one or more sets of relative timing constraints, which include a first set of relative timing constraints, wherein the first set of relative timing constraints meets the following criteria: i) the first set is suitable for preventing the asynchronous circuit from entering two or more bad states in which a correctness property of the asynchronous circuit is violated, and ii) the first set comprises a plurality of relative timing constraints, wherein each relative timing constraint within the first set is associated with a bad state whose associated relative timing constraints comprise this relative timing constraint but no other relative timing constraint that is implied by another relative timing constraint in the first set.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: November 17, 2020
    Inventors: Viktor Khomenko, Danil Sokolov, Alex Yakovlev
  • Patent number: 10581435
    Abstract: An asynchronous circuit and methods for requesting that an action is triggered. The circuit performs the following steps: 1) receive a plurality of input signals, the input signals each having a first transition between states at a different time, 2) select one of the input signals based on the time of its first transition compared to the time of the first transition of the other input signals, 3) provide a request to an action block to: i) trigger the action in response to receiving the request, and ii) to provide an acknowledgement upon completion of the action, wherein the request and the action are dependent on the input signal that was selected, 4) receive the acknowledgement from the action block, and 5) initiate steps 1) to 4) for a second transition of the input signals after the plurality of input signals have undergone their first transitions.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: March 3, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Danil Sokolov, Viktor Khomenko, Alex Yakovlev