Abstract: A decoding device includes a signal-conditioning device for generating an intermediate signal from an input signal, a data register for storing a time section of the intermediate signal and a bit decoder for converting the intermediate signal into an output signal having at least one bit. The decoding device also includes a pattern recognition device. The decoding device enables even severely disturbed signals to be reliably detected and correctly decoded. Simple adaptation of the decoding device to various uses is possible. A smart card including the decoding device is also provided.

Abstract: In accordance with the USB specifications, an accuracy of 0.25% is required for the data transmission rate. To generate a clock signal that allows this accuracy, the invention uses a clock generator unit that does not require a crystal. The clock generator unit includes an internal clock generator, a pulse counter that is connected to the internal clock generator, a pulse number memory, and a pulse filter. The pulse counter counts the number of internally generated clock pulses between two pulses of the synchronization signal, which are transmitted in accordance with the USB specification. The difference between the ascertained pulse number and a nominal pulse number is evaluated and is used for controlling the pulse-suppressing pulse filter. This results in a stabilized clock signal.

Abstract: In accordance with the USB specifications, an accuracy of 0.25% is required for the data transmission rate. To generate a clock signal that allows this accuracy, the invention uses a clock generator unit that does not require a crystal. The clock generator unit includes an internal clock generator, a pulse counter that is connected to the internal clock generator, a pulse number memory, and a pulse filter. The pulse counter counts the number of internally generated clock pulses between two pulses of the synchronization signal, which are transmitted in accordance with the USB specification. The difference between the ascertained pulse number and a nominal pulse number is evaluated and is used for controlling the pulse-suppressing pulse filter. This results in a stabilized clock signal.

Abstract: A decoding device includes a signal-conditioning device for generating an intermediate signal from an input signal, a data register for storing a time section of the intermediate signal and a bit decoder for converting the intermediate signal into an output signal having at least one bit. The decoding device also includes a pattern recognition device. The decoding device enables even severely disturbed signals to be reliably detected and correctly decoded. Simple adaptation of the decoding device to various uses is possible. A smart card including the decoding device is also provided.