Patents by Inventor Viktor Tasevski

Viktor Tasevski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10408643
    Abstract: Methods, apparatus, systems and articles of manufacture to increase resolver-to-digital converter accuracy are disclosed.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: September 10, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Shanmuganand Chellamuthu, Viktor Tasevski, Ted F. Lekan, Fei Xu
  • Patent number: 10107841
    Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: October 23, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Viktor Tasevski, Kemal S. Demirci
  • Publication number: 20180052013
    Abstract: Methods, apparatus, systems and articles of manufacture to increase resolver-to-digital converter accuracy are disclosed.
    Type: Application
    Filed: September 26, 2016
    Publication date: February 22, 2018
    Inventors: Shanmuganand Chellamuthu, Viktor Tasevski, Ted F. Lekan, Fei Xu
  • Publication number: 20170023621
    Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.
    Type: Application
    Filed: June 3, 2016
    Publication date: January 26, 2017
    Inventors: Viktor Tasevski, Kemal S. Demirci