Patents by Inventor Vimal Kumar
Vimal Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12293085Abstract: Some data storage devices have a plurality of memory dies that can be read in parallel for certain types of read requests. Read requests pertaining to a garbage collection operation are often generated sequentially and, thus, are not eligible for parallel execution in the memory dies. In an example data storage device presented herein, such read requests are consolidated and sent to the memory for execution in parallel across the memory dies.Type: GrantFiled: July 25, 2023Date of Patent: May 6, 2025Assignee: Sandisk Technologies, Inc.Inventors: Pradeep Seetaram Hegde, Ramanathan Muthiah, Nagaraj Dandigenahalli Rudrappa, Vimal Kumar Jain
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Publication number: 20250117763Abstract: A computer-implemented real-time payment system for clearing and settlement of transactions is described. The real-time payment system is adapted to implement a method of automated liquidity maintenance. The real-time payment system receives transactions for clearing and settlement from a plurality of participants, each of which has a liquidity position in the real-time payment system. At least some of the participants have a funded liquidity position in a central bank. The real-time payment system determines whether the liquidity position of each of the participants meets predetermined rules. If the liquidity position of any of the participants does not meet a predetermined rule applicable when the determination is made, the system requests an adjustment for that liquidity position so that it complies with that predetermined rule. The real-time payment system also coordinates with the central bank to use one of the funded liquidity positions to support that adjustment to a liquidity position.Type: ApplicationFiled: October 4, 2024Publication date: April 10, 2025Inventors: Prasanth Kuruvilla John, German Blanco Gutierrez, Stephen Richard Wright, Vimal Kumar Rajasekaran
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Publication number: 20250094160Abstract: Disclosed is a method, performed by an electronic device, for validation of a second version of a software or a second structure model for control of a wind turbine. The method comprises obtaining first load data from simulating a load of the wind turbine using a first structural model and a first version of the software. The method comprises obtaining second load data from simulating the load of the wind turbine using the first structural model and the second version of the software or using the first version of the software and a second structural model. The second version of the software is an update of the first version of the software. The second structural model is an update of the first structural model. The method comprises determining, based on the first load data and the second load data, a statistical parameter.Type: ApplicationFiled: September 13, 2024Publication date: March 20, 2025Inventors: Leo THESBJERG, Kasper ZINCK, Vimal Kumar MANI, Fathima FERSHANA A
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Publication number: 20240427494Abstract: Some data storage devices have a plurality of memory dies that can be read in parallel for certain types of read requests. Read requests pertaining to a garbage collection operation are often generated sequentially and, thus, are not eligible for parallel execution in the memory dies. In an example data storage device presented herein, such read requests are consolidated and sent to the memory for execution in parallel across the memory dies.Type: ApplicationFiled: July 25, 2023Publication date: December 26, 2024Applicant: Western Digital Technologies, Inc.Inventors: Pradeep Seetaram Hegde, Ramanathan Muthiah, Nagaraj Dandigenahalli Rudrappa, Vimal Kumar Jain
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Patent number: 12175167Abstract: Optical fiber network or fiber network is used for transmitting large volumes of data with maximum speed. Fiber to home is a recent technology of the fiber network where the initial fiber rollout cost is more. Hence a proper network management is necessary to rollout the fiber network in an optimized manner. Conventional methods provides construction led approach for fiber network planning and field survey. The present disclosure receives a plurality of geocoded addresses associated with a plurality of users and an average revenue per user. A fiber rollout cost projection is performed based on the input data and a fiber network is generated based on the projected fiber rollout cost. Further, field survey is performed based on the generated network and a fiber network construction design is made. Further, a fiber network rollout is performed based on the fiber network construction design and a redline deviation markup.Type: GrantFiled: March 9, 2021Date of Patent: December 24, 2024Assignee: TATA CONSULTANCY SERVICES LIMITEDInventors: Ashwani Gupta, Vimal Kumar, Rajesh Aggarwal
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Publication number: 20240201525Abstract: A system includes a classical computing system and one or more quantum computing chips coupled to the classical computing system. The one or more quantum computing chips includes one or more electro-optic devices. Each electro-optic device includes a substrate, a waveguide disposed on top of the substrate, and a layer stack disposed on top of the waveguide and including a plurality of electro-optic material layers interleaved with a plurality of interlayers. Each electro-optic device further comprising a waveguide core disposed on top of a portion of the layer stack. The plurality of interlayers are characterized by a first lattice structure and the plurality of electro-optic material layers are under tensile stress and are characterized by a second lattice structure and crystallographic phase.Type: ApplicationFiled: December 18, 2023Publication date: June 20, 2024Applicant: Psiquantum, Corp.Inventors: Yong Liang, Mark G. Thompson, Chia-Ming Chang, Vimal Kumar Kamineni
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Patent number: 11940873Abstract: Apparatuses, systems, and methods for low latency parity for a memory device include a controller configured to accumulate, in a memory buffer, combined parity data for a plurality of regions of memory of a memory device in response to write operations for the plurality of regions of memory. The controller is configured to perform a recovery operation for a region of memory in response to determining that a latency setting for the region satisfies a latency threshold. The controller is configured to service a read request for data from the region based on a recovery operation to satisfy the latency setting.Type: GrantFiled: December 31, 2021Date of Patent: March 26, 2024Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Ramanathan Muthiah, Vimal Kumar Jain
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Publication number: 20240063146Abstract: A wafer includes a silicon layer, a first dielectric layer on the silicon layer, and a ferroelectric layer on the first dielectric layer. The ferroelectric layer defines one or more gaps between portions of the ferroelectric layer. The wafer also includes a second dielectric layer on the ferroelectric layer and disposed within the one or more gaps.Type: ApplicationFiled: November 2, 2023Publication date: February 22, 2024Applicant: Psiquantum, Corp.Inventors: Yong Liang, Vimal Kumar Kamineni, Chia-Ming Chang, James McMahon
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Patent number: 11892715Abstract: An electro-optic device includes a substrate and a waveguide on the substrate. The waveguide includes a layer stack including a plurality of electro-optic material layers interleaved with a plurality of interlayers and a waveguide core adjacent to the layer stack. The waveguide may include a pair of electrodes in electrical contact with the plurality of electro-optic material layers. The plurality of interlayers maintains a first lattice structure at room temperature and a cryogenic temperature. The plurality of electro-optic material layers maintains a second lattice structure and crystallographic phase at the room temperature and the cryogenic temperature.Type: GrantFiled: December 15, 2021Date of Patent: February 6, 2024Assignee: Psiquantum, Corp.Inventors: Yong Liang, Mark G. Thompson, Chia-Ming Chang, Vimal Kumar Kamineni
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Patent number: 11847026Abstract: A data storage system according to certain aspects can share a single snapshot for multiple applications and/or agents. For example, the data storage system can receive snapshot commands from multiple applications and/or agents, and can group them for a single snapshot (e.g., based on time of receipt of the snapshot commands). Data associated with the multiple applications and/or agents may reside on a single LUN or volume. The data storage system can take a single snapshot of the LUN or volume, and generate metadata regarding which portion of the snapshot is related to which application. The single snapshot can be stored in one or more secondary storage devices. The single snapshot may be partitioned into portions relating to different applications and stored separately.Type: GrantFiled: September 29, 2020Date of Patent: December 19, 2023Assignee: Commvault Systems, Inc.Inventors: Paramasivam Kumarasamy, Brahmaiah Vallabhaneni, Prashanth Nagabhushana Bangalore, Vimal Kumar Nallathambi, Dmitriy Borisovich Zakharkin
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Patent number: 11817400Abstract: In some embodiments method comprises depositing a ferroelectric layer on a top surface of a semiconductor wafer and forming one or more gaps in the ferroelectric layer. The one or more gaps can be formed on a repetitive spacing to relieve stresses between the ferroelectric layer and the semiconductor wafer. A first dielectric layer is deposited over the ferroelectric layer and the first dielectric layer is planarized to fill in the gaps. A second dielectric layer is formed between the ferroelectric layer and the semiconductor wafer. The second dielectric layer can be formed by annealing the wafer in an oxidizing atmosphere such that an upper portion of the semiconductor substrate forms an oxide layer between the semiconductor substrate and the ferroelectric layer.Type: GrantFiled: July 15, 2021Date of Patent: November 14, 2023Assignee: Psiquantum, Corp.Inventors: Yong Liang, Vimal Kumar Kamineni, Chia-Ming Chang, James McMahon
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Patent number: 11809327Abstract: Technology is disclosed for relocating data in a non-volatile storage system. An integrated memory assembly has a control die and a memory die that contains the memory cells. The control die contains control circuitry that relocates data from one set of physical addresses on the memory die to another set of physical addresses on the memory die. This relocation results in a change of a mapping between logical addresses for the data and the physical addresses for the data. The control circuitry may update an L2P table on the memory die after the relocation to map the logical addresses of the data to the second set of physical addresses. The control die may construct a validity bitmap, which specifies whether data at a physical address is valid or invalid. The foregoing reduces data transfer between the integrated memory assembly and a memory controller, which saves time and power.Type: GrantFiled: November 16, 2021Date of Patent: November 7, 2023Assignee: Western Digital Technologies, Inc.Inventors: Vimal Kumar Jain, Bala Siva Kumar Narala
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Publication number: 20230312314Abstract: A vehicle immobilizer system comprised of at least one deployable, remotely actuated lift system. The lift system is transported by a movable frame which can be remotely operated. The movable frame suspends the lift system during transport. However, during the lifting operation, the lift system bears the weight of the vehicle, while the movable frame does not. As a result, the movable frame can be of lightweight construction while the lift system can be robust. The lift system supports a universal docking plate which is designed to contact the suspect vehicle and suspend it without damaging it.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Inventors: Dave Clayton, Claude Michel, Shrikrishna Shivakumar, Vimal Kumar Viswanathan
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Patent number: 11739277Abstract: Organic sulfur compounds which are generally present in the crude oil undergoes various transformations while processing the crude oil in the secondary processing units such as fluid catalytic cracker, hydrocracker, delayed coker, visbreaker, etc. The sulfur present in the feed which enters into these secondary processing units are distributed into various products coming out of the units. Sulfur compounds which are present in the various product fractions are removed to meet the desired specifications before routing to the final product pool. Conventionally, sulfur present in the LPG has been removed by amine treatment followed by caustic and water wash. The present invention relates to a process for removal of sulfur and other impurities from Liquefied Petroleum Gas (LPG) comprising olefins through reactive desulfurization route. The present invention is an eco-friendly process as it minimizes or eliminates the use of caustic which is conventionally used to remove the sulfur from LPG.Type: GrantFiled: March 17, 2021Date of Patent: August 29, 2023Assignee: Indian Oil Corporation LimitedInventors: Saravanan Subramani, Vimal Kumar Upadhyay, Prosenjit Maji, Reshmi Manna, Vatsala Sugumaran, Mahalingam Vanamamalai, Madhusudan Sau, Gurpreet Singh Kapur, Sankara Sri Venkata Ramakumar
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Publication number: 20230225324Abstract: A Synergistic pesticidal composition against sucking pests complex. More particularly the present invention relates to a synergistic pesticidal composition comprising of bioactive amount of Diafenthiuron and Pyriproxyfen with at least one agro-chemically active insecticide selected from Thiamethoxam, Imidacloprid, Thiacloprid, Dinotefuran, Clothianidin, and Pymetrozine. The present invention further relates to process for preparing the said compositions in specific ratio. The present invention further relates to the process for preparing the said composition along with at least one inactive excipient; and formulations thereof. The present invention further relates to the synergistic insecticidal compositions, wherein active ingredient present infixed ratio shows synergy in insecticidal activity and formulation thereof are stable in nature.Type: ApplicationFiled: June 12, 2021Publication date: July 20, 2023Inventors: Vimal Kumar, Raajan Kumar Ailawadhi, Ajit S. Gujral
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Publication number: 20230214291Abstract: Apparatuses, systems, and methods for low latency parity for a memory device include a controller configured to accumulate, in a memory buffer, combined parity data for a plurality of regions of memory of a memory device in response to write operations for the plurality of regions of memory. The controller is configured to perform a recovery operation for a region of memory in response to determining that a latency setting for the region satisfies a latency threshold. The controller is configured to service a read request for data from the region based on a recovery operation to satisfy the latency setting.Type: ApplicationFiled: December 31, 2021Publication date: July 6, 2023Applicant: Western Digital Technologies, Inc.Inventors: RAMANATHAN MUTHIAH, VIMAL KUMAR JAIN
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Publication number: 20230153248Abstract: Technology is disclosed for relocating data in a non-volatile storage system. An integrated memory assembly has a control die and a memory die that contains the memory cells. The control die contains control circuitry that relocates data from one set of physical addresses on the memory die to another set of physical addresses on the memory die. This relocation results in a change of a mapping between logical addresses for the data and the physical addresses for the data. The control circuitry may update an L2P table on the memory die after the relocation to map the logical addresses of the data to the second set of physical addresses. The control die may construct a validity bitmap, which specifies whether data at a physical address is valid or invalid. The foregoing reduces data transfer between the integrated memory assembly and a memory controller, which saves time and power.Type: ApplicationFiled: November 16, 2021Publication date: May 18, 2023Applicant: Western Digital Technologies, Inc.Inventors: Vimal Kumar Jain, Bala Siva Kumar Narala
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Patent number: 11650932Abstract: A non-volatile storage system includes a memory controller connected to an integrated memory assembly. The integrated memory assembly includes a memory die comprising non-volatile memory cells and a control die bonded to the memory die. The memory controller receives commands from a host, performs logical address to physical address translation (“address translation”) operations for the commands, and instructs the integrated memory assembly to perform one or more operations in support of the command. The control die also includes the ability to perform the address translation. When performing a command from the host, the memory controller can choose to perform the necessary address translation or instruct the control die to perform the address translation. When the control die performs the address translation, the resulting physical address is used by the control die to perform one or more operations in support of the command.Type: GrantFiled: February 17, 2021Date of Patent: May 16, 2023Assignee: Western Digital Technologies, Inc.Inventors: Rakesh Balakrishnan, Eldhose Peter, Akhilesh Yadav, Ramanathan Muthiah, Vimal Kumar Jain
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Patent number: 11651956Abstract: A method for removing a native oxide film from a semiconductor substrate includes repetitively depositing layers of germanium on the native oxide and heating the substrate causing the layer of germanium to form germanium oxide, desorbing a portion of the native oxide film. The process is repeated until the oxide film is removed. A subsequent layer of strontium titanate can be deposited on the semiconductor substrate, over either residual germanium or a deposited germanium layer. The germanium can be converted to silicon germanium oxide by exposing the strontium titanate to oxygen.Type: GrantFiled: March 11, 2022Date of Patent: May 16, 2023Assignee: PSIQUANTUM, CORP.Inventors: Yong Liang, Vimal Kumar Kamineni
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Patent number: 11640338Abstract: The systems and methods herein permit storage systems to correctly perform data recovery, such as direct access recovery, of Network Data Management Protocol (“NDMP”) backup data that was modified prior to being stored in secondary storage media, such as tape. The systems and methods permit NDMP backup data to be encrypted, compressed, deduplicated, and/or otherwise modified prior to storage. The systems and methods herein also permit a user to perform a precautionary snapshot of the current state of data (e.g., primary data) prior to reverting data to a previous state using point-in-time data.Type: GrantFiled: March 10, 2021Date of Patent: May 2, 2023Assignee: Commvault Systems, Inc.Inventors: Duncan Alden Littlefield, Vimal Kumar Nallathambi, Girish Chanchlani