Patents by Inventor Vinay Agarwala

Vinay Agarwala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11687460
    Abstract: Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: June 27, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael W. LeBeane, Walter B. Benton, Vinay Agarwala
  • Publication number: 20180314638
    Abstract: Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 1, 2018
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Michael W. LeBeane, Walter B. Benton, Vinay Agarwala
  • Patent number: 7006155
    Abstract: A system for forming composite video images from one or more foreground images and one or more background images. In one embodiment, s sum of a suppressed foreground image signal with weight ?, with one or more selected foreground colors suppressed, and a background image signal with weight 1??? (0????1) is formed, where a and ?? may vary from pixel to pixel and with time. In another embodiment, a shadow from a selected foreground image is impressed on selected pixels of a background image. In another embodiment, foreground suppression and shadowing are combined, optionally by retrofitting, using an existing ?-mixer or a newly constructed ?-mixer. Provision of a chroma key map allows a foreground image shadow to be prescribed pixel by pixel, including a transition region in which the shadowed image slowly disappears.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: February 28, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vinay Agarwala, Clement Tse