Patents by Inventor Vinay Sandeep

Vinay Sandeep has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MEMORY SUB-SYSTEM TRANSFER QUEUE RETENTION
    Publication number: 20240053924
    Abstract: A method includes issuing a program command to a logic unit (LUN) of a memory device, writing a plurality of commands to a transfer queue within the memory device, detecting a program failure for the LUN of the memory device, and maintaining a number of the plurality of commands in the transfer queue.
    Type: Application
    Filed: August 12, 2022
    Publication date: February 15, 2024
    Inventors: Vinay Sandeep, Sanandan Sharma, Amit Bhardwaj, Prashanth Reddy Enukonda
  • Multichip dual write
    Patent number: 9952784
    Abstract: Identical data is written to multiple nonvolatile memory chips connected to a memory bus by sending address information to a first nonvolatile memory chip and a second nonvolatile memory chip, selecting the first and second nonvolatile memory chips, while the first nonvolatile and second nonvolatile memory chips are both selected, sending user data over the memory bus to the first and second nonvolatile memory chips in parallel, and programming the user data in the first nonvolatile memory chip and the second nonvolatile memory chip in parallel.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: April 24, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Rohit Hassan Sathyanarayan, Vinay Sandeep
  • Multichip Dual Write
    Publication number: 20160266821
    Abstract: Identical data is written to multiple nonvolatile memory chips connected to a memory bus by sending address information to a first nonvolatile memory chip and a second nonvolatile memory chip, selecting the first and second nonvolatile memory chips, while the first nonvolatile and second nonvolatile memory chips are both selected, sending user data over the memory bus to the first and second nonvolatile memory chips in parallel, and programming the user data in the first nonvolatile memory chip and the second nonvolatile memory chip in parallel.
    Type: Application
    Filed: March 11, 2015
    Publication date: September 15, 2016
    Inventors: Rohit Hassan Sathyanarayan, Vinay Sandeep