Abstract: A wireless electronic detonator includes a primary source of energy and at least one functional module. A power switch is disposed between the primary source of energy and the functional module to connect or disconnect the functional module and the primary source of energy. A controller controls the power switch and includes an optical receiver to detect and demodulate a light signal emitted by a control console, The controller generates a control signal according to the demodulated light signal to at least control the power switch. A wireless detonation system includes the wireless electronic detonator and the control console configured to emit a light signal, and method for activating the wireless electronic detonator.

Abstract: The invention relates to a device for transmission of data on a frequency spectrum divided into a plurality Nf of spectrum fragments (f1, f2) each of which covers a frequency band, the frequency bands being discontiguous. The device comprises a packet generator configured to generate a data packet comprising a payload and at least one occurrence of a constant envelope signalling sequence. Said sequence, for example a modified Zadoff-Chu sequence, comprises N complex symbols and consists of a plurality of complex symbol sets each associated with one of the spectrum fragments. Each set comprises N/Nf complex symbols and each complex symbol of a set comprises a scaling term to the frequency band covered by the spectrum fragment associated with this set and a spectral transposition term in the frequency band covered by the spectrum fragment associated with this set.

Abstract: The invention relates to a device for transmission of data on a frequency spectrum divided into a plurality Nf of spectrum fragments (f1, f2) each of which covers a frequency band, the frequency bands being discontiguous. The device comprises a packet generator configured to generate a data packet comprising a payload and at least one occurrence of a constant envelope signalling sequence. Said sequence, for example a modified Zadoff-Chu sequence, comprises N complex symbols and consists of a plurality of complex symbol sets each associated with one of the spectrum fragments. Each set comprises N/Nf complex symbols and each complex symbol of a set comprises a scaling term to the frequency band covered by the spectrum fragment associated with this set and a spectral transposition term in the frequency band covered by the spectrum fragment associated with this set.

Abstract: A transceiving system using a joined modulation alphabet A having a size M the symbols of which are distributed on a plurality N of orthogonal dimensions, the symbols carried by a dimension belonging to a linear sub-alphabet An having a size P, with M=NP. The transmitter performs a turbocoding of a block of information bits, the code words provided by the turbocoder being mapped to symbols of the joined modulation alphabet before modulating the signal to be transmitted. The receiver performs turbodecoding from the projection of the symbols received on the orthogonal dimensions of the alphabet.

Abstract: A transceiving system using a joined modulation alphabet A having a size M the symbols of which are distributed on a plurality N of orthogonal dimensions, the symbols carried by a dimension belonging to a linear sub-alphabet An having a size P, with M=NP. The transmitter performs a turbocoding of a block of information bits, the code words provided by the turbocoder being mapped to symbols of the joined modulation alphabet before modulating the signal to be transmitted. The receiver performs turbodecoding from the projection of the symbols received on the orthogonal dimensions of the alphabet.

Abstract: A filter bank multi-carrier (FBMC) receiver implementing a synchronization in the frequency domain. The receiver includes a synchronization module including an error estimator on the sampling instants and, for each subcarrier, an interpolating filter for reconstructing the samples at the accurate sampling instants. A phase-shifter is provided, for each subcarrier, at the output of the interpolating filter, to make a phase compensation. The phase-shifter can be followed by an equalizer in the frequency domain.

Abstract: A filter bank multi-carrier (FBMC) receiver implementing a synchronization in the frequency domain. The receiver includes a synchronization module including an error estimator on the sampling instants and, for each subcarrier, an interpolating filter for reconstructing the samples at the accurate sampling instants. A phase-shifter is provided, for each subcarrier, at the output of the interpolating filter, to make a phase compensation. The phase-shifter can be followed by an equalizer in the frequency domain.

Abstract: The invention relates to a channel estimating method for an FBMC telecommunication system. The disclosed estimating method uses the signal before it is filtered by the analysis filter bank. According to a first embodiment, the preamble is composed of a repetition in time of an elementary pattern of pilot symbols and the channel estimate is made in the stationary part of the preamble. According to a second embodiment, the preamble is composed of a predetermined pattern of pilot symbols distributed in time and in frequency, and the channel estimate may be made on a typical part of the preamble. The channel thus estimated is used to make an equalisation before the analysis filter bank.

Abstract: The invention relates to a channel estimating method for an FBMC telecommunication system. The disclosed estimating method uses the signal before it is filtered by the analysis filter bank. According to a first embodiment, the preamble is composed of a repetition in time of an elementary pattern of pilot symbols and the channel estimate is made in the stationary part of the preamble. According to a second embodiment, the preamble is composed of a predetermined pattern of pilot symbols distributed in time and in frequency, and the channel estimate may be made on a typical part of the preamble. The channel thus estimated is used to make an equalisation before the analysis filter bank.

Abstract: The invention relates to a process for detection of a signal in a frequency sub-band of a frequency band of an acquired signal y(t), the process comprising: acquisition of the signal y(t) in a frequency band; frequential analysis of said acquired signal y(t) to obtain at least one frequential signal Y with NFFT frequential components; breakdown into M frequency sub-bands i of size N of the frequential signal Y, the size of each frequency sub-band being a function of the bandwidth of the signal to be detected; determination, in the frequential domain, for each frequency sub-band, of a criterion Ti, i=1, . . . , M as a function of the energy of the signal in the frequency sub-band i and of the coefficient two of the autocorrelation function of the signal in the frequency sub-band i; decision, as a function of the criterion Ti, to determine whether a signal is detected in the sub-band i.

Abstract: The invention relates to a treatment process of a signal received from a multi-carrier transmitter (1) with filter banks by a multi-carrier receiver (2) with filter banks, to perform synchronization from a preamble.

Abstract: The invention relates to a treatment process of a signal received from a multi-carrier transmitter (1) with filter banks by a multi-carrier receiver (2) with filter banks, to perform synchronisation from a preamble.

Abstract: A receiver (1) has an equalizer (2, 4, 5) which introduces inter symbol interferance (ISI) in a controlled manner and low pass filters to reduce noise. The ISI is introduced and the noise is reduced by a filter (4) in an adaptation path. A trellis decoder (3) of the receiver (1) removes the ISI to avoid propagation error. It does this in front end modules (20), outside of its critical path. There is a better decoder performance because noise is smaller.

Abstract: An address generation unit (AGU) and a digital signal processor (DSP) including such an AGU are disclosed. The AGU (3) has a register file (4) providing order (R), stage (S), and displacement (N) values to a digital addressing unit (DAU) (5) for performing one of eight addressing operations. The register file provides an input (X) to the DAU and receives an output (Y) from the DAU. Within the DAU (5), selection multiplexers (13, 14) select full adder outputs to provide Y, or bit-select from adders and the input (X) to provide Y. For a radix-4 operation, most significant bits (MSBs) are taken from the input (X), middle bits are taken from the output of a first adder (adder1), and the least significant bits (LSBs) are taken from the output of a second adder (adder2) if there is a carry out from the first adder. The AGU may also include bit reverse blocks connected at both the input and output of an adder.

Abstract: A receiver (1) has an equalizer (2, 4, 5) which introduces inter symbol interferance (ISI) in a controlled manner and low pass filters to reduce noise. The ISI is introduced and the noise is reduced by a filter (4) in an adaptation path. A trellis decoder (3) of the receiver (1) removes the ISI to avoid propagation error. It does this in front end modules (20), outside of its critical path. There is a better decoder performance because noise is smaller.