Patents by Inventor Vincent Brendan Ashe

Vincent Brendan Ashe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11170815
    Abstract: An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: November 9, 2021
    Assignee: Seagate Technology LLC
    Inventors: Zheng Wu, Jason Bellorado, Marcus Marrow, Vincent Brendan Ashe
  • Patent number: 11016681
    Abstract: An apparatus may include a circuit configured to receive an input signal at an input and process the input signal using a set of channel parameters. The circuit may further determine an error metric for the processing of the input signal using the set of channel parameters, compare the error metric to a plurality of thresholds, and when the error metric matches one of the plurality of thresholds, adapt, using an adaptation algorithm, the set of channel parameters to produce an updated set of channel parameters for use by the circuit as the set of channel parameters in subsequent processing of the input signal, the adaptation of the set of channel parameters being based on a weight corresponding to the matching threshold of the plurality of thresholds.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: May 25, 2021
    Assignee: Seagate Technology LLC
    Inventors: Marcus Marrow, Jason Bellorado, Vincent Brendan Ashe, Zheng Wu
  • Patent number: 10790933
    Abstract: Systems and methods are disclosed for constrained receiver parameter optimization. Two parameter optimization functions may be applied, with one function providing constraints on the results of the second function in order to determine a parameter set to apply in the receiver. A method may comprise determining a first parameter set based on a first function, determining a second parameter set based on a second function different from the first function, and determining a third parameter set by using the first parameter set to define a subset of a parameter space to which to limit values from the second parameter set. In certain embodiments, a least squares function may be used to constrain the results of a general cost function.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 29, 2020
    Assignee: Seagate Technology LLC
    Inventors: Vincent Brendan Ashe, Jason Vincent Bellorado, Marcus Marrow
  • Patent number: 10714134
    Abstract: An apparatus can include a circuit configured to process an input signal using a set of channel parameters. The circuit can produce, using a first adaptation algorithm, a first set of channel parameters for use by the circuit as the set of channel parameters in processing the input signal. The circuit can further approximate a second set of channel parameters of a second adaptation algorithm for use by the circuit as the set of channel parameters in processing the input signal based on the first set of channel parameters and a relationship between a third set of channel parameters generated using the first adaptation algorithm and a fourth set of channel parameters generated using the second adaptation algorithm. In addition, the circuit can perform the processing of the input signal using the second set of channel parameters as the set of channel parameters.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: July 14, 2020
    Assignee: Seagate Technology LLC
    Inventors: Marcus Marrow, Jason Bellorado, Vincent Brendan Ashe, Rishi Ahuja
  • Patent number: 10468060
    Abstract: An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 5, 2019
    Assignee: Seagate Technology LLC
    Inventors: Zheng Wu, Jason Bellorado, Marcus Marrow, Vincent Brendan Ashe
  • Patent number: 10460762
    Abstract: An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal with a first rate and receive a second signal with a second rate corresponding to second underlying data. The circuit may interpolate the first underlying data to generate a plurality of interpolated signals, determine, for the first signal, a first channel pulse response shape with the first rate, and determine an interference component signal based on the plurality of interpolated signals and the first channel pulse response shape. The circuit may then cancel interference in the second signal using the interference component signal to generate a cleaned signal.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: October 29, 2019
    Assignee: Seagate Technology LLC
    Inventors: Zheng Wu, Jason Bellorado, Marcus Marrow, Vincent Brendan Ashe
  • Patent number: 10382166
    Abstract: Systems and methods are disclosed for constrained receiver parameter optimization. Two parameter optimization functions may be applied, with one function providing constraints on the results of the second function in order to determine a parameter set to apply in the receiver. A method may comprise determining a first parameter set based on a first function, determining a second parameter set based on a second function different from the first function, and determining a third parameter set by using the first parameter set to define a subset of a parameter space to which to limit values from the second parameter set. In certain embodiments, a least squares function may be used to constrain the results of a general cost function.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: August 13, 2019
    Assignee: Seagate Technology LLC
    Inventors: Vincent Brendan Ashe, Jason Vincent Bellorado, Marcus Marrow
  • Publication number: 20180367164
    Abstract: An apparatus may include a circuit configured to process an input signal using a set of channel parameters. The circuit may produce, using a first adaptation algorithm, a first set of channel parameters for use by the circuit as the set of channel parameters in processing the input signal. The circuit may further approximate a second set of channel parameters of a second adaptation algorithm for use by the circuit as the set of channel parameters in processing the input signal based on the first set of channel parameters and a relationship between a third set of channel parameters generated using the first adaptation algorithm and a fourth set of channel parameters generated using the second adaptation algorithm. In addition, the circuit may perform the processing of the input signal using the second set of channel parameters as the set of channel parameters.
    Type: Application
    Filed: October 25, 2017
    Publication date: December 20, 2018
    Applicant: Seagate Technology LLC
    Inventors: Marcus Marrow, Jason Bellorado, Vincent Brendan Ashe, Rishi Ahuja
  • Patent number: 9419651
    Abstract: A system and method for correcting errors in an ECC block using soft-decision data. In an embodiment, a soft-decision ECC decoding method, uses “soft” data indicative of how reliable bits of data are when read out. Such a method may use an update module for receiving and manipulating the soft-decision data and iteratively change bits or groups of bits based upon an ordering of the reliability factors. Then a calculator module may determine the total number of errors still remaining after each iteration. Determining just the total number of errors instead of the actual locations is far less computationally intensive, and therefore, many combination of potential flip-bit combination may be analyzed quickly to determine if any combination might reduce the total number of errors enough to be handled by the conventional hard-decision ECC decoding method.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: August 16, 2016
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Razmik Karabed, Hakan C. Ozdemir, Vincent Brendan Ashe, Richard Barndt
  • Patent number: 8413023
    Abstract: A system and method for correcting errors in an ECC block using erasure-identification data when generating an error-locator polynomial. In an embodiment, a ECC decoding method, uses “erasure” data indicative of bits of data that are unable to be deciphered by a decoder. Such a method may use an Berlekamp-Massey algorithm that receives two polynomials as inputs; a first polynomial indicative of erasure location in the stream of bits and a syndrome polynomial indicative of all bits as initially determined. The Berlekamp-Massey algorithm may use the erasure identification information to more easily decipher the overall codeword when faced with a error-filled codeword.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Vincent Brendan Ashe, Hakan C. Ozdemir, Razmik Karabed, Richard Barndt
  • Patent number: 8407563
    Abstract: A system and method for correcting errors in an ECC block using soft-decision data. In an embodiment, a soft-decision ECC decoding method, uses “soft” data indicative of how reliable bits of data are when read out. Such reliability information may be used to identify particular symbols with a higher likelihood of error such that these symbols may be changed in an attempt to reduce the total number of errors in the data. In an embodiment, a soft-decision ECC decoding path may include a reliability checker operable to receive bits of data read from a data store and operable to associate a reliability factor with each bit of data. Then, an update module may iteratively change bits or groups of bits based upon an ordering of the reliability factors.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Razmik Karabed, Hakan C. Ozdemir, Vincent Brendan Ashe, Richard Barndt
  • Publication number: 20100174954
    Abstract: A system and method for correcting errors in an ECC block using soft-decision data. In an embodiment, a soft-decision ECC decoding method, uses “soft” data indicative of how reliable bits of data are when read out. Such a method may use an update module for receiving and manipulating the soft-decision data and iteratively change bits or groups of bits based upon an ordering of the reliability factors. Then a calculator module may determine the total number of errors still remaining after each iteration. Determining just the total number of errors instead of the actual locations is far less computationally intensive, and therefore, many combination of potential flip-bit combination may be analyzed quickly to determine if any combination might reduce the total number of errors enough to be handled by the conventional hard-decision ECC decoding method.
    Type: Application
    Filed: December 31, 2009
    Publication date: July 8, 2010
    Applicant: STMicroelectronics, Inc.
    Inventors: Razmik Karabed, Hakan C. Ozdemir, Vincent Brendan Ashe, Richard Barndt
  • Publication number: 20100174969
    Abstract: A system and method for correcting errors in an ECC block using erasure-identification data when generating an error-locator polynomial. In an embodiment, a ECC decoding method, uses “erasure” data indicative of bits of data that are unable to be deciphered by a decoder. Such a method may use an Berlekamp-Massey algorithm that receives two polynomials as inputs; a first polynomial indicative of erasure location in the stream of bits and a syndrome polynomial indicative of all bits as initially determined. The Berlekamp-Massey algorithm may use the erasure identification information to more easily decipher the overall codeword when faced with a error-filled codeword.
    Type: Application
    Filed: December 31, 2009
    Publication date: July 8, 2010
    Applicant: STMICROELECTRONICS, INC.
    Inventors: VINCENT BRENDAN ASHE, HAKAN C. OZDEMIR, RAZMIK KARABED, RICHARD BARNDT
  • Publication number: 20100169746
    Abstract: A system and method for correcting errors in an ECC block using soft-decision data. In an embodiment, a soft-decision ECC decoding method, uses “soft” data indicative of how reliable bits of data are when read out. Such reliability information may be used to identify particular symbols with a higher likelihood of error such that these symbols may be changed in an attempt to reduce the total number of errors in the data. In an embodiment, a soft-decision ECC decoding path may include a reliability checker operable to receive bits of data read from a data store and operable to associate a reliability factor with each bit of data. Then, an update module may iteratively change bits or groups of bits based upon an ordering of the reliability factors.
    Type: Application
    Filed: December 31, 2009
    Publication date: July 1, 2010
    Applicant: STMICROELECTRONICS, INC.
    Inventors: RAZMIK KARABED, HAKAN C. OZDEMIR, VINCENT BRENDAN ASHE, RICHARD BARNDT