Abstract: There is a method of manufacturing a semiconductor device with a semiconductor body comprising a semiconductor substrate and a semiconductor region which are separated from each other with an electrically insulating layer which includes a first and a second sub-layer which, viewed in projection, are adjacent to one another, wherein the first sub-layer has a smaller thickness than the second sub-layer, and wherein, in a first sub-region of the semiconductor region lying above the first sub-layer, at least one digital semiconductor element is formed and, in a second sub-region of the semiconductor region lying above the second sub-layer, at least one analog semiconductor element is formed. According to an example embodiment, the second sub-layer is formed in that the lower border thereof is recessed in the semiconductor body in relation to the lower border of the first sub-layer Fully depleted SOI devices are thus formed.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a semiconductor body (1) comprising a semiconductor substrate (2) and a semiconductor region (3) which are separated from each other by means of an electrically insulating layer (4) which comprises a first and second sublayer (4A, 4B) that are viewed in projection adjacent to each other, whereby the first sublayer (4A) is provided with a smaller thickness than the second sublayer (4B) and whereby in a first subregion (3B) of the semiconductor region (3) lying above the first sublayer (4A) at least one digital semiconductor element (5) is formed and in a second subregion (3B) of the semiconductor region (3) lying above the second sublayer (4B) at least one analogue semiconductor element (6) is formed. According to the invention the second sublayer (4B) is formed in such a way that the lower border thereof is in relation to the lower border of the first sublayer (4A) formed sunken in the semiconductor body (1).

Abstract: The present invention provides a method for processing a semiconductor device wherein a dielectric layer is partially converted into a silicon-oxy-nitride by incorporation of nitrogen atoms into the dielectric layer, which comprises a silicon oxide. Before the introduction of the nitrogen atoms into the dielectric layer, the dielectric layer is provided as a silicon oxide in which the atomic silicon to oxygen ration is greater than ½. In this way, MOS transistors are obtained with a high quality interface between the dielectric region and semiconductor substrate, and a dielectric region which is impermeable to impurity atoms from the gate region and which has a thickness which is substantially equal to the dielectric layer as deposited.