Abstract: The present disclosure describes methods and apparatuses for testing an integrated circuit. In some aspects, a test engine of a system-on-chip (SoC) receives a test trigger from an external test port of a multi-chip module. The multi-chip module includes the SoC and integrated circuitry. Responsive to receiving the test trigger, the test engine initiates execution of a test associated with the integrated circuitry. The test engine also generates test data associated with the test and provides the test data at the external test port of the MCM. In this manner, internal tests can be executed within the multi-chip module. In other aspects, the SoC and the integrated circuitry are not packaged together. The test engine can receive the test trigger from a test port of the SoC and initiate execution of the test. In this way, the SoC may act as a test instrument for the integrated circuitry.