Patents by Inventor Vincent DeStefanis

Vincent DeStefanis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072183
    Abstract: A substrate to fabricate a photodiode structure has a top layer made from cadmium-doped semiconductor material. A first HgCdTe-base layer is formed by liquid phase epitaxy from the top layer with a bath containing an n-type electrically active dopant to electrically dope the first layer. The cadmium diffuses from the top layer to the first layer to form a decreasing cadmium concentration gradient from the interface with the top layer in a direction away from the interface. The cadmium concentration gradient causes a decreasing band gap width gradient in the first layer from the interface and causes an n-type dopant concentration gradient in the first layer from the interface.
    Type: Application
    Filed: December 30, 2021
    Publication date: February 29, 2024
    Applicant: LYNRED
    Inventors: Nicolas PERE-LAPERNE, Alexandre KERLAIN, Vincent DESTEFANIS, Paul FOUGERES
  • Patent number: 8993418
    Abstract: The deposition method comprises providing a substrate with a first mono-crystalline zone made of a semiconductor material and a second zone made of an insulating material. During a passivation step, a passivation atmosphere is applied on the substrate so as to cover the first zone with doping impurities. During a deposition step, gaseous silicon and/or germanium precursors are introduced and a doped semiconductor film is formed. The semiconductor film is mono-crystalline over the first zone and has a different texture over the second zone. During an etching step, a chloride gaseous precursor is applied on the substrate so as to remove the semiconductor layer over the second zone.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: March 31, 2015
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics, Inc.
    Inventors: Vincent Destefanis, Nicolas Loubet
  • Publication number: 20140024203
    Abstract: The deposition method comprises providing a substrate with a first mono-crystalline zone made of a semiconductor material and a second zone made of an insulating material. During a passivation step, a passivation atmosphere is applied on the substrate so as to cover the first zone with doping impurities. During a deposition step, gaseous silicon and/or germanium precursors are introduced and a doped semiconductor film is formed. The semiconductor film is mono-crystalline over the first zone and has a different texture over the second zone. During an etching step, a chloride gaseous precursor is applied on the substrate so as to remove the semiconductor layer over the second zone.
    Type: Application
    Filed: November 19, 2010
    Publication date: January 23, 2014
    Applicants: Commissariat a L'Energie Atomique Et Aux Energies Alternatives, STMICROELECTRONICS, INC.
    Inventors: Vincent Destefanis, Nicolas Loubet
  • Patent number: 8501596
    Abstract: A manufacturing method of a microelectronic device including at least one semi-conductor zone which rests on a support and which exhibits a germanium concentration gradient in a direction parallel to the principal pane of the support.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: August 6, 2013
    Assignee: Commissariat a l'Energie Atmoique
    Inventors: Benjamin Vincent, Vincent Destefanis
  • Patent number: 8110460
    Abstract: A method for producing stacked and self-aligned components on a substrate, including: providing a substrate made of monocrystalline silicon having one face enabling production of components, forming a stack of layers on the face of the substrate, selective etching by a gaseous mixture comprising gaseous HCl conveyed by a carrier gas and at a temperature between 450° C. and 900° C., depositing resin, implementing lithography of the resin, replacing resin eliminated during the lithography with a material for confining remaining resin, and forming elements of the components.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: February 7, 2012
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Romain Wacquez, Philippe Coronel, Vincent Destefanis, Jean-Michel Hartmann
  • Publication number: 20100099233
    Abstract: The invention relates to a method for producing stacked and self-aligned components on a substrate, comprising the following steps: forming a stack of layers on one face of the substrate, the stack comprising a first sacrificial layer, a second sacrificial layer and a superficial layer, selective etching of a zone of the first sacrificial layer, the second sacrificial layer and the superficial layer forming a bridge above the etched zone of the first sacrificial layer, depositing resin in the etched zone of the first sacrificial layer and on the superficial layer, lithography of the resin to leave remaining at least one zone of resin in the etched zone of the first sacrificial layer, in alignment with at least one resin zone on the superficial layer, replacing the eliminated resin in the etched zone of the first sacrificial layer and on the superficial layer with a material for confining the remaining resin, eliminating the remaining resin zones in the etched zone of the first sacrificial layer and on the
    Type: Application
    Filed: October 12, 2009
    Publication date: April 22, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Romain Wacquez, Philippe Coronel, Vincent Destefanis, Jean-Michel Hartmann
  • Publication number: 20100068869
    Abstract: A method for the realization of a microelectronic device which includes at least one semi-conductor zone which rests on a support and which exhibits a Germanium concentration gradient in a direction parallel to the principal plane of the support, where the method involves steps for: a) The formation, on a support, of at least one oxidation masking layer which includes one or more holes, where the holes reveal at least one first semi-conductor zone which includes inclined flanks and which is based on Si, b) The formation of at least one second semi-conductor zone based on Si1-xGex (where 0<x) on said first semi-conductor zone based on Si, c) Thermal oxidation of said first semi-conductor zone and of the second semi-conductor zone through said masking layer.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 18, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Benjamin VINCENT, Vincent DESTEFANIS
  • Patent number: 5318785
    Abstract: An improvement in dough compositions comprising the replacement of bromate improvers in conventional doughs with compositions comprising ascorbic acid, azodicarbonamide, and mixtures thereof in combination with peroxy compounds such as benzoyl peroxide and hydrogen peroxide in the presence or absence of fungal enzymes such as fungal alpha amylase and processes for their use are disclosed.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: June 7, 1994
    Assignee: Elf Atochem North America, Inc.
    Inventor: Vincent DeStefanis