Patents by Inventor Vincent Dufossez

Vincent Dufossez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6137362
    Abstract: The present invention relates to a differential stage including two first transistors respectively controlled by two components of a differential input voltage, these transistors being connected to a common current source and forming two differential output branches. The stage includes an auxiliary transistor controlled by the common mode of the differential input voltage and connected to take from each of the output branches a portion of the current established by the common current source.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: October 24, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Vincent Dufossez
  • Patent number: 6060957
    Abstract: A relaxation oscillator includes a first capacitor at the terminals of which there is a first voltage V.sub.1, a circuit to charge the first capacitor from a power supply voltage, a circuit to discharge the first capacitor, and a switch which alternately charges and discharges the first capacitor responsive to a control signal. The relaxation oscillator also includes a relaxation circuit to generate the oscillation signal and the control signal from the first voltage. The oscillator also includes a regulation circuit to cause the first voltage applied to the relaxation circuit to be approximately equal to a reference voltage. The circuit for charging the first capacitor includes a resistance R.sub.1. The relaxation oscillator is particularly applicable to phase locked loops.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: May 9, 2000
    Assignee: STMicroelectronics S.A.
    Inventors: Marc Kodrnja, Vincent Dufossez
  • Patent number: 5952889
    Abstract: A phase-locked loop of the type including a locking aid circuit providing a d.c. presetting signal representative of the carrier frequency of an input signal to set the quiescent frequency of a controlled oscillator of the phase-locked lop. The locking aid circuit includes a monostable latch clocked by the input signal to provide pulses of predetermined width, the presetting signal corresponding to the mean value of these pulses.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: September 14, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Vincent Dufossez
  • Patent number: 5510755
    Abstract: A voltage-controlled capacitor includes a multiplier, having an output which serves as terminals of the controlled capacitor. The output voltage of the multiplier is applied to a reference capacitor. A signal in phase with the current in the reference capacitor is applied at one input of the multiplier, the other input of the multiplier receiving a signal determining the value of the controlled capacitor.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: April 23, 1996
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventors: Marc Kodrnja, Vincent Dufossez