Patents by Inventor Vincent E. Splett

Vincent E. Splett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6128528
    Abstract: A cyclic redundancy code (CRC) and optionally a syndrome value calculation of one or more implantable medical device (IMD) data block is conducted by block mover/reader hardware of the IMD when the data block(s) are moved and/or read. In the block read operation, each data byte or word in the block mover data register is read in a first clock cycle. In the block move operation, each data byte is read in the first clock cycle in this way and then moved to a destination register in a second clock cycle. The data CRC and optionally the syndrome value accumulate in the CRC and syndrome registers as all data bytes of the data block(s) are read in the first clock cycle.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: October 3, 2000
    Assignee: Medtronics, Inc.
    Inventors: James H. Ericksen, Carl A. Schu, Vincent E. Splett, Paul J. Huelskamp
  • Patent number: 4792894
    Abstract: Arithmetic Units in an SIMD processor are configurated so that status is computed based upon arithmetic conditions. This status could reflect conditions such as "A greater than B", "A equal to zero", or "overflow". The status implemented in a SIMD processor is dependent upon the specific application of the processor. values of 0 or 1, representing status conditions of true or false are typically latched in a status latch. One of the status latch bits can then be selected through a Multiplexer, (the selecting being done by an instruction from the control unit), and is called the selected condition. This selected condition is serially shifted into a Status Shift Register. The accumulated status bits from several data computations can be built up in the Status Shift Register, where the new selected condition bit is shifted in, and all the original bits in the Status Shift Register are shifted left one place.
    Type: Grant
    Filed: March 17, 1987
    Date of Patent: December 20, 1988
    Assignee: Unisys Corporation
    Inventors: Ray E. Artz, Richard J. Martin, Vincent E. Splett