Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.

Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.

Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.

Abstract: The invention concerns a method comprising: forming a plurality of parallel lines (502, 504, 506) of a sacrificial material over a layer of conductive material (510) of an integrated circuit, said parallel lines being separated by trenches, at least one of said lines being interrupted along its length by an opening (516) dividing it into first and second line portions (504A, 504B) separated by a space (S); forming spacers (522, 524, 526, 528, 530) in said trenches on lateral sides of said line portions and filling at least a bottom part of said opening between the line portions; removing the sacrificial material by etching; and forming interconnection lines (302, 304A, 304B, 306A, 306B, 308, 310) of said conductive material based on a pattern defined by said spacers.

Abstract: A method for defining parallel lines extending along a first direction in a same level of an integrated circuit, among which at least first and second lines separated by an even number of lines are interconnected, a space having a width at least equal to the minimum space between two lines separated by one line being left free, in a second direction perpendicular to the first direction, on either side of a minimum rectangle containing the first and the second lines.

Abstract: A method for determining, by means of a computer, a photolithography mask for the manufacturing a microstructure by grey level etching of a resist layer, this mask including a plurality of elementary cells, each including an opaque area arranged, in top view, in a non-peripheral portion of a transparent region or, conversely, in a transparent area arranged, in top view, in a non-peripheral portion of an opaque region, comprising the steps of: a) initializing the mask pattern in a first state; b) determining, by simulation, the profile of the microstructure which would result from the use of the mask according to said pattern; c) adjusting said pattern by modifying, in certain cells, the position of the opaque or transparent area within the cell; and d) forming the mask according to said pattern.

Abstract: A method for defining parallel lines extending along a first direction in a same level of an integrated circuit, among which at least first and second lines separated by an even number of lines are interconnected, a space having a width at least equal to the minimum space between two lines separated by one line being left free, in a second direction perpendicular to the first direction, on either side of a minimum rectangle containing the first and the second lines.

Abstract: A method for determining, by means of a computer, a photolithography mask for the manufacturing a microstructure by grey level etching of a resist layer, this mask including a plurality of elementary cells, each including an opaque area arranged, in top view, in a non-peripheral portion of a transparent region or, conversely, in a transparent area arranged, in top view, in a non-peripheral portion of an opaque region, comprising the steps of: a) initializing the mask pattern in a first state; b) determining, by simulation, the profile of the microstructure which would result from the use of the mask according to said pattern; c) adjusting said pattern by modifying, in certain cells, the position of the opaque or transparent area within the cell; and d) forming the mask according to said pattern.