Patents by Inventor Vincent Fiori

Vincent Fiori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9648724
    Abstract: An electronic device has a rear plate that includes a substrate rear layer, a substrate front layer and a dielectric intermediate layer between the substrate rear and front layers. An electronic structure is on the substrate front layer and includes electronic components and electrical connections. The substrate rear layer includes a solid local region and a hollowed-out local region. The hollowed-out local region extends over all of the substrate rear layer. The substrate rear layer does not cover at least one local zone of the dielectric intermediate layer corresponding to the hollowed-out local region.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: May 9, 2017
    Assignees: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS SA
    Inventors: Nicolas Hotellier, François Guyader, Vincent Fiori, Richard Fournel, Frédéric Gianesello
  • Patent number: 9638589
    Abstract: A method and corresponding system are provided for determining a three-dimensional stress field of an object having a flat surface. At least four flat resistors are placed on the flat surface of the object, with at least one of the resistors having a geometry different from that of the others. A variation of resistance of the resistors is measured. The three-dimensional stress field is determined from a system of equations involving the stress field, values of variations of the measured resistive values and sensitivity parameters of the resistors.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 2, 2017
    Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Vincent Fiori, Pierre Bar, Sébastien Gallois-Garreignot
  • Publication number: 20160366758
    Abstract: An electronic device has a rear plate that includes a substrate rear layer, a substrate front layer and a dielectric intermediate layer between the substrate rear and front layers. An electronic structure is on the substrate front layer and includes electronic components and electrical connections. The substrate rear layer includes a solid local region and a hollowed-out local region. The hollowed-out local region extends over all of the substrate rear layer. The substrate rear layer does not cover at least one local zone of the dielectric intermediate layer corresponding to the hollowed-out local region.
    Type: Application
    Filed: December 2, 2015
    Publication date: December 15, 2016
    Inventors: Nicolas HOTELLIER, François GUYADER, Vincent FIORI, Richard FOURNEL, Frédéric GIANESELLO
  • Patent number: 9449896
    Abstract: A device includes a support, a three-dimensional integrated structure above the support, and a lateral encapsulation region arranged around the structure. The lateral encapsulation region includes first channels configured to make it possible to circulate a cooling fluid.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: September 20, 2016
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Sandrine Lhostis, Olga Kokshagina, Yann Beilliard, Vincent Fiori
  • Patent number: 9356090
    Abstract: A substrate includes an active region oriented along a crystallographic face (100) and limited by an insulating region. A MOS transistor includes a channel oriented longitudinally along a crystallographic direction of the <110> type. A basic pattern made of metal and formed in the shape of a T is electrically inactive and situated over an area of the insulating region adjacent a transverse end of the channel. A horizontal branch of the T-shaped basic pattern is oriented substantially parallel to the longitudinal direction of the channel.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: May 31, 2016
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Vincent Fiori, Sebastien Gallois-Garreignot, Denis Rideau, Clement Tavernier
  • Publication number: 20150311277
    Abstract: A substrate includes an active region oriented along a crystallographic face (100) and limited by an insulating region. A MOS transistor includes a channel oriented longitudinally along a crystallographic direction of the <110> type. A basic pattern made of metal and formed in the shape of a T is electrically inactive and situated over an area of the insulating region adjacent a transverse end of the channel. A horizontal branch of the T-shaped basic pattern is oriented substantially parallel to the longitudinal direction of the channel.
    Type: Application
    Filed: March 6, 2015
    Publication date: October 29, 2015
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Vincent Fiori, Sebastien Gallois-Garreignot, Denis Rideau, Clement Tavernier
  • Patent number: 9099603
    Abstract: A method for manufacturing an image sensor, including the steps of: forming elementary structures of an image sensor on the first surface of a semiconductor substrate; installing a layer on the first surface; defining trenches in the layer, the trenches forming a pattern in the layer; and installing, on a hollow curved substrate, the obtained device on the free surface side of the layer, the pattern being selected according to the shape of the support surface.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: August 4, 2015
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Vincent Fiori
  • Publication number: 20150200151
    Abstract: A device includes a support, a three-dimensional integrated structure above the support, and a lateral encapsulation region arranged around the structure. The lateral encapsulation region includes first channels configured to make it possible to circulate a cooling fluid.
    Type: Application
    Filed: January 6, 2015
    Publication date: July 16, 2015
    Inventors: Sandrine LHOSTIS, Olga Kokshagina, Yann Beilliard, Vincent Fiori
  • Publication number: 20150022987
    Abstract: An electronic device includes an integrated circuit chip with an insulating passivation layer. An opening in the passivation layer uncovers a first region of an electrical contact. An electrical connection pad is formed to fill the opening by covering the first region and extend in projection in such a way as to cover a second region situated on the passivation layer surrounding the opening. The periphery of at least one of the first and second regions has an elongate or oblong shape. Centers of the opening and the pad are aligned with each other.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 22, 2015
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Sebastien Gallois-Garreignot, Jérôme Lopez, Gil Provent, Caroline Moutin, Vincent Fiori
  • Publication number: 20140373640
    Abstract: A method and corresponding system are provided for determining a three-dimensional stress field of an object having a flat surface. At least four flat resistors are placed on the flat surface of the object, with at least one of the resistors having a geometry different from that of the others. A variation of resistance of the resistors is measured. The three-dimensional stress field is determined from a system of equations involving the stress field, values of variations of the measured resistive values and sensitivity parameters of the resistors.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 25, 2014
    Inventors: Vincent FIORI, Pierre BAR, Sébastien GALLOIS-GARREIGNOT
  • Publication number: 20130270662
    Abstract: A method for manufacturing an image sensor, including the steps of: forming elementary structures of an image sensor on the first surface of a semiconductor substrate; installing a handle on the first surface; defining trenches in the handle, the trenches forming a pattern in the handle; and installing, on a hollow curved substrate, the obtained device on the free surface side of the handle, the pattern being selected according to the shape of the support surface.
    Type: Application
    Filed: April 8, 2013
    Publication date: October 17, 2013
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Vincent Fiori
  • Publication number: 20110272801
    Abstract: A semiconductor device includes an integrated circuit and external electrical connection pads. Each pad includes cavities that are at least partially filled with a material different from the material forming the pads, so as to form inserts.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 10, 2011
    Applicants: STMICROELECTRONICS S.A., STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Vincent Fiori, Philippe Delpech, Eric Sabouret
  • Patent number: 7667292
    Abstract: An integrated circuit includes at least one capacitor that is formed on a layer provided with at least one first trench. The capacitor, which is provided with a dielectric layer that separates two electrodes, conforms to the shape of the first trench, but leaves a part of the first trench unfilled. A material capable of absorbing stresses associated with the displacements of the walls of the trench is placed in the trench to fill the part of the first trench. A second trench is formed at least partly surrounding the first trench. This second trench is also at least partly filled with a material capable of absorbing stresses associated with the displacements of the walls of the second trench. A void may be included in the stress absorbing material which fills either of the first or second trenches.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: February 23, 2010
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Christophe Giraudin, Vincent Fiori, Philippe Delpech
  • Publication number: 20060255427
    Abstract: An integrated circuit includes at least one capacitor that is formed on a layer provided with at least one first trench. The capacitor, which is provided with a dielectric layer that separates two electrodes, conforms to the shape of the first trench, but leaves a part of the first trench unfilled. A material capable of absorbing stresses associated with the displacements of the walls of the trench is placed in the trench to fill the part of the first trench. A second trench is formed at least partly surrounding the first trench. This second trench is also at least partly filled with a material capable of absorbing stresses associated with the displacements of the walls of the second trench. A void may be included in the stress absorbing material which fills either of the first or second trenches.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 16, 2006
    Applicants: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Christophe Giraudin, Vincent Fiori, Philippe Delpech