Abstract: A circuit and method are disclosed for testing line replaceable units (LRUs) and interconnect buses of an avionics system in which the various LRUs exchange information by means of transmitting and/or receiving digital communication words, each word having a predetermined, standardized serial bit format. A stream of communication words, each comprised of a predetermined number of bits, is serially received and converted to parallel format by a shift register that cooperates with a word counter also coupled to the stream of words, so as to output successively and in parallel format, each communication word. A general purpose digital data analyzer is used to display the binary form of each parallel bit word, and to decode and display the engineering and numeric data contained therein. The order of a certain field of bits of each word representing a word label is reversed in the shift register to enable direct decoding of the label by the data analyzer.