Patents by Inventor Vincent Lee

Vincent Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210260364
    Abstract: A system includes an implanted autonomous microchiplet communicatively linked to an epidermal skinpatch having a transceiver and a demodulator, an intermediate device communicatively linked to the epidermal skinpatch, the intermediate device configured to receive neural signals for decoding from the epidermal skinpatch and to send encoded signals for patterned stimulation to the epidermal skinpatch, and one or more external devices communicatively linked to intermediate device.
    Type: Application
    Filed: July 16, 2019
    Publication date: August 26, 2021
    Inventors: Peter Michael Asbeck, Farah Laiwalla, Vincent Wingching Leung, Jihun Lee, Lawrence Ernest Larson, Patrick Mercier, Arto Nurmikko, Ramesh Rao
  • Publication number: 20210224221
    Abstract: An apparatus includes a first device having a clock signal and configured to communicate, via a data bus, with a second device configured to assert a data strobe signal and a plurality of data bit signals on the data bus. The first device may include a control circuit configured, during a training phase, to determine relative timing between the clock signal, the plurality of data bit signals, and the data strobe signal. The first device may determine, using a first set of sampling operations, a first timing relationship of the plurality of data bit signals relative to the data strobe signal, and determine, using a second set of sampling operations, a second timing relationship of the plurality of data bit signals and the data strobe signal relative to the clock signal. During an operational phase, the control circuit may be configured to use delays based on the first and second timing relationships to sample data from the second device on the data bus.
    Type: Application
    Filed: April 2, 2021
    Publication date: July 22, 2021
    Inventors: Navaneeth P. Jamadagni, Ji Eun Jang, Anatoly Yakovlev, Vincent Lee, Guanghua Shu, Mark Semmelmeyer
  • Patent number: 11070004
    Abstract: A magnetic connector assembly has a female connector with spring-loaded conductive pins slightly protruding inside a recess or cavity in the female connector's body. A corresponding male connector has a protrusion on its body with conductive pins slightly indented into the protrusion's surface. The protrusion on the male connector is sized and shaped to fit into the cavity in the female connector such that the male connector's pins engage the pins of the female connector, allowing for electrical communication across the connector assembly. Magnets on the male and female connectors secure them in a correct orientation. A unique shape ensures proper alignment of the pins and prevents the connection of incompatible devices.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 20, 2021
    Inventor: Vincent Lee
  • Patent number: 11019701
    Abstract: LED structures (e.g., LED arrays) and fabrication methods can reduce or even eliminate deep etching, and associated defect formation, proximate sites of individual LEDs. Such approaches can achieve desired electrical isolation without deep etching, provide a high conductivity current spreading layer, and, or reduce losses otherwise associated with conventional fabrication approaches. Some implementations advantageously lift off or separate an insulating substrate from a wafer to expose a bottom surface of the epitaxial LED layer and forms a backside contact (e.g., ground plane) overlying the bottom surface. Other implementations isolate deep etching away from sensitive regions and locate the backside contact on a top surface of the epitaxial LED layer. Some implementations form light extraction features (e.g., photonic crystals) on the exposed bottom surface. The top surface of the epitaxial LED layer may be undoped to improve electrical isolation.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: May 25, 2021
    Assignee: LUMIODE, INC.
    Inventors: Vincent Lee, Ioannis Kymissis, Brian Tull
  • Publication number: 20210117722
    Abstract: In one embodiment, a method for tracking includes capturing a first frame of the environment using a first camera, identifying, in the first frame, a first patch that corresponds to the first feature, accessing a first local memory of the first camera that stores reference patches identified in one or more previous frames captured by the first camera, and determining that none of the reference patches stored in the first local memory corresponds to the first feature. The method further includes receiving, from a second camera through a data link connecting the second camera with the first camera, a reference patch corresponding to the first feature. The reference patch is identified in a previous frame captured by the second camera and of the second camera. The method may then determine correspondence data between the first patch and the reference patch, and tracks the first feature in the environment based on the determined correspondence data.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 22, 2021
    Inventors: Muzaffer Kal, Armin Alaghi, Vincent Lee, Richard Andrew Newcombe, Amr Suleiman, Muhammad Huzaifa
  • Patent number: 10983944
    Abstract: An apparatus includes a first device having a clock signal and configured to communicate, via a data bus, with a second device configured to assert a data strobe signal and a plurality of data bit signals on the data bus. The first device may include a control circuit configured, during a training phase, to determine relative timing between the clock signal, the plurality of data bit signals, and the data strobe signal. The first device may determine, using a first set of sampling operations, a first timing relationship of the plurality of data bit signals relative to the data strobe signal, and determine, using a second set of sampling operations, a second timing relationship of the plurality of data bit signals and the data strobe signal relative to the clock signal. During an operational phase, the control circuit may be configured to use delays based on the first and second timing relationships to sample data from the second device on the data bus.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: April 20, 2021
    Assignee: Oracle International Corporation
    Inventors: Navaneeth P. Jamadagni, Ji Eun Jang, Anatoly Yakovlev, Vincent Lee, Guanghua Shu, Mark Semmelmeyer
  • Publication number: 20210042025
    Abstract: A computing system can present a miniprofile comprising an avatar associated with a first account, a handle associated with the first account, a description associated with the first account, and a swipe icon; receive, at the swipe icon, an upward swipe; in response to receiving the upward swipe, present a occupying a larger portion of the display than the miniprofile, the full profile comprising an image associated with the first account, the avatar, the handle, the description, and at least a first post associated with the first account; receive, at the swipe icon, a downward swipe; determine that the downward swipe was a fast downward swipe; and based on determining that the downward swipe was the fast downward swipe, close the full profile and present a feed, the feed comprising at least a second post associated with a second account and a third post associated with a third account.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 11, 2021
    Inventors: Bryan Haggerty, Brittany Forks, Zayaan Khatib, Vincent Lee
  • Publication number: 20200305253
    Abstract: LED structures (e.g., LED arrays) and fabrication methods can reduce or even eliminate deep etching, and associated defect formation, proximate sites of individual LEDs. Such approaches can achieve desired electrical isolation without deep etching, provide a high conductivity current spreading layer, and, or reduce losses otherwise associated with conventional fabrication approaches. Some implementations advantageously lift off or separate an insulating substrate from a wafer to expose a bottom surface of the epitaxial LED layer and forms a backside contact (e.g., ground plane) overlying the bottom surface. Other implementations isolate deep etching away from sensitive regions and locate the backside contact on a top surface of the epitaxial LED layer. Some implementations form light extraction features (e.g., photonic crystals) on the exposed bottom surface. The top surface of the epitaxial LED layer may be un-doped to improve electrical isolation.
    Type: Application
    Filed: May 8, 2020
    Publication date: September 24, 2020
    Inventors: Vincent Lee, Ioannis Kymissis, Brian Tull
  • Publication number: 20200287323
    Abstract: A magnetic connector assembly has a female connector with spring-loaded conductive pins slightly protruding inside a recess or cavity in the female connector's body. A corresponding male connector has a protrusion on its body with conductive pins slightly indented into the protrusion's surface. The protrusion on the male connector is sized and shaped to fit into the cavity in the female connector such that the male connector's pins engage the pins of the female connector, allowing for electrical communication across the connector assembly. Magnets on the male and female connectors secure them in a correct orientation. A unique shape ensures proper alignment of the pins and prevents the connection of incompatible devices.
    Type: Application
    Filed: February 6, 2020
    Publication date: September 10, 2020
    Inventor: VINCENT LEE
  • Publication number: 20200233832
    Abstract: An apparatus includes a first device having a clock signal and configured to communicate, via a data bus, with a second device configured to assert a data strobe signal and a plurality of data bit signals on the data bus. The first device may include a control circuit configured, during a training phase, to determine relative timing between the clock signal, the plurality of data bit signals, and the data strobe signal. The first device may determine, using a first set of sampling operations, a first timing relationship of the plurality of data bit signals relative to the data strobe signal, and determine, using a second set of sampling operations, a second timing relationship of the plurality of data bit signals and the data strobe signal relative to the clock signal. During an operational phase, the control circuit may be configured to use delays based on the first and second timing relationships to sample data from the second device on the data bus.
    Type: Application
    Filed: January 17, 2019
    Publication date: July 23, 2020
    Inventors: Navaneeth P. Jamadagni, Ji Eun Jang, Anatoly Yakovlev, Vincent Lee, Guanghua Shu, Mark Semmelmeyer
  • Patent number: 10686455
    Abstract: Disclosed is a signal generator that includes a memory to store tuning voltage values and offset voltage values. An adder/subtractor circuit is coupled to the memory to produce a sum and a difference of the tuning and offset voltages. A comparator circuit is coupled to the adder/subtractor circuit to receive a digitized voltage controlled oscillator tuning voltage and to compare the digitized voltage controlled oscillator tuning voltage to the sum and difference of the tuning and offset voltages to produce a window bounded by the sum and difference of the tuning and offset voltages. The comparator circuit is further configured to generate control signals. A steering current circuit is coupled to the comparator circuit to receive the control signals from the comparator circuit and to control a steering current based on the control signals.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: June 16, 2020
    Assignee: TELEDYNE DEFENSE ELECTRONICS, LLC
    Inventors: Anthony David Williams, Gursewak Singh Rai, Vincent Lee
  • Publication number: 20200166774
    Abstract: A temple bar cam is disclosed that, when used in pairs, sustains a pair of eyeglasses so that the nose pads remain above a wearer's nose. One temple bar cam is placed on each temple bar of a pair of eyeglasses. As the eyeglasses are placed on a wearer's face, the temple bar cams rotate into the user's temples, causing the eyeglasses to cease downward movement and holding the eyeglasses in place just above the user's nose. The temple bar cams may be made of a soft, elastic, and nontoxic material, such as medical grade silicon, for the wearer's comfort. The wearer's comfort is further enhanced by the frustum shape of the temple bar cams, and a bore extending through each temple bar cam in order to increase deformability of the temple bar cam's shape.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 28, 2020
    Inventor: Vincent Lee
  • Patent number: 10664546
    Abstract: Techniques are provided for enhancing a user's browsing experience, especially when the user is browsing third party websites via an application. For example, a user may use the application to browse web pages served from a third party website that is associated with a particular domain. While browsing the third party web pages, the user may save a URL corresponding to a third party web page that the user is currently viewing. In this manner, the user may store one or more URLs corresponding to web pages served from the third party website and/or served from multiple different third party domains browsed by the user. The saved URLs may be associated with the user. When the user browses web pages associated with a particular domain, a user selectable option may be provided that enables the user to see URLs stored for the user that are associated with that particular domain. The user may then select a particular displayed URL to access the web page corresponding to the selected URL.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: May 26, 2020
    Assignee: FACEBOOK, INC.
    Inventors: Vincent Lee Fiorentini, Ming Fei Li, Prakash Ahuja, Yue Cai, Sean Michael Wiese, Yi-Lin Jao, Ziqin Wang
  • Patent number: 10652963
    Abstract: LED structures (e.g., LED arrays) and fabrication methods can reduce or even eliminate deep etching, and associated defect formation, proximate sites of individual LEDs. Such approaches can achieve desired electrical isolation without deep etching, provide a high conductivity current spreading layer, and, or reduce losses otherwise associated with conventional fabrication approaches. Some implementations advantageously lift off or separate an insulating substrate from a wafer to expose a bottom surface of the epitaxial LED layer and forms a backside contact (e.g., ground plane) overlying the bottom surface. Other implementations isolate deep etching away from sensitive regions and locate the backside contact on a top surface of the epitaxial LED layer. Some implementations form light extraction features (e.g., photonic crystals) on the exposed bottom surface. The top surface of the epitaxial LED layer may be undoped to improve electrical isolation.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: May 12, 2020
    Assignee: LUMIODE, INC.
    Inventors: Vincent Lee, Ioannis Kymissis, Brian Tull
  • Publication number: 20200143790
    Abstract: Methods and apparatus are provided for automatically adjusting, by an audio device, the SPL of its audio output. As described herein, the SPL is adjusted based on detected ambient noise. According to aspects, audio device iteratively adjusts the SPL based on the ambient noise. According to aspects, the SPL is adjusted to be greater than the ambient noise by a threshold SPL amount. According to aspects, the audio device outputs sound in substantially a first direction and the microphone detects sound substantially outside of the first direction. The adjusted sounds are output by the audio device.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 7, 2020
    Inventors: Mehul TRIVEDI, Vincent LEE, Cory ROBERTS, James P. MULVEY, Guy Anthony TORIO
  • Publication number: 20190364631
    Abstract: LED structures (e.g., LED arrays) and fabrication methods can reduce or even eliminate deep etching, and associated defect formation, proximate sites of individual LEDs. Such approaches can achieve desired electrical isolation without deep etching, provide a high conductivity current spreading layer, and, or reduce losses otherwise associated with conventional fabrication approaches. Some implementations advantageously lift off or separate an insulating substrate from a wafer to expose a bottom surface of the epitaxial LED layer and forms a backside contact (e.g., ground plane) overlying the bottom surface. Other implementations isolate deep etching away from sensitive regions and locate the backside contact on a top surface of the epitaxial LED layer. Some implementations form light extraction features (e.g., photonic crystals) on the exposed bottom surface. The top surface of the epitaxial LED layer may be undoped to improve electrical isolation.
    Type: Application
    Filed: May 22, 2019
    Publication date: November 28, 2019
    Inventors: Vincent Lee, Ioannis Kymissis, Brian Tull
  • Publication number: 20190341221
    Abstract: The present disclosure provides a method to adjust asymmetric velocity of a scan in a scanning ion beam etch process to correct asymmetry of etching between the inboard side and the outboard side of device structures on a wafer, while maintaining the overall uniformity of etch across the full wafer.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 7, 2019
    Applicant: Plasma-Therm NES LLC
    Inventors: Sarpangala Hariharakeshava Hegde, Vincent Lee
  • Patent number: 10404710
    Abstract: A method, apparatus and computer program product are provided for implementing an improved directory services system. An example of the method includes transmitting an access request to a directory services server, the access request comprising user credentials, receiving, in response to validation of the user credentials by the directory services server, a directory services response from the directory services server, the directory services response comprising one or more fields of directory services data generated by the directory services server, translating the directory services response to generate a generic data object, wherein the generic data object comprises one or more values derived from the one or more fields of directory service data included in the directory services response, and providing the generic data object to an application.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: September 3, 2019
    Assignee: CHANGE HEALTHCARE HOLDINGS, LLC
    Inventors: Bryan Self, Michael Patterson, Vincent Lee
  • Patent number: 10343916
    Abstract: Provided are methods for forming graphene or functionalized graphene thin films. Also provided are graphene and functionalized graphene thin films formed by the methods. For example, electrophoretic deposition methods and stamping methods are used. Defect-free thin films can be formed. Patterned films can be formed. The methods can provide conformal coatings on non-planar substrates.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 9, 2019
    Assignee: The Research Foundation for The State University of New York
    Inventors: Sarbajit Banerjee, Vincent Lee, Luisa Whitaker
  • Patent number: D914282
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 23, 2021
    Inventor: Vincent Lee