Patents by Inventor Vincent Liot

Vincent Liot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7622983
    Abstract: A circuit for biasing the bulk of a MOS transistor, including a capacitive element connecting the bulk of the MOS transistor to a source of an voltage.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: November 24, 2009
    Assignees: STMicroelectronics S.A., Commissariat A l'energie Atomique
    Inventors: Olivier Thomas, Marc Belleville, Vincent Liot, Philippe Flatresse
  • Patent number: 7315017
    Abstract: The optical device comprises a first and a second optical sources respectively emitting a first incident beam and a second light beam of different wavelength. Reflecting means, which may be a mirror, are arranged on the optical path of the first incident beam so as to form a reflected light beam. The reflecting means are arranged outside and proximate to the optical path of the second light beam so that the reflected beam and the second light beam pass through a zone of the space, wherein an object to be analyzed is to be exposed, and reach a common sensor.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: January 1, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Christophe Kopp, Vincent Liot
  • Publication number: 20070262809
    Abstract: A circuit for biasing the bulk of a MOS transistor, including a capacitive element connecting the bulk of the MOS transistor to a source of an A.C. voltage.
    Type: Application
    Filed: March 16, 2007
    Publication date: November 15, 2007
    Applicants: STMicroelectronics S.A., Commissariat A L'energie Atomique
    Inventors: Olivier Thomas, Marc Belleville, Vincent Liot, Philippe Flatresse
  • Publication number: 20060155523
    Abstract: A first simulation running through all the possible input states is used to collect information on the drain, gate and source biasing of each transistor. This transistor bias information is used to perform an interpolation in charts of internal potentials. These charts are tabulations of internal potentials for different drain, gate and source biases, different transistor widths and different power supply voltages. The values extracted from these charts can then be compared in order to obtain maximum and minimum internal potential values. These maximum and minimum internal potential values are then used to precondition the logic gate in a state that is an amalgamation of all the steady states that are the most favourable and/or least favourable in terms of propagation time and consumption.
    Type: Application
    Filed: January 10, 2006
    Publication date: July 13, 2006
    Applicant: STMicroelectronics SA
    Inventors: Vincent Liot, Philippe Flatresse
  • Publication number: 20050200964
    Abstract: The optical device comprises a first and a second optical sources (7,8) respectively emitting a first incident beam (10) and a second light beam (11) of different wavelength. Reflecting means, which may be a mirror (15), are arranged on the optical path of the first incident beam (10) so as to form a reflected light beam (12). The reflecting means are arranged proximate to the optical path of the second light beam (11) so that the reflected beam (12) and the second light beam (11) pass through a zone of the space (14), wherein an object to be analyzed is to be exposed, and reach a common sensor (13).
    Type: Application
    Filed: October 1, 2003
    Publication date: September 15, 2005
    Inventors: Christophe Kopp, Vincent Liot