Patents by Inventor Vincent Loncke
Vincent Loncke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11765723Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless communication relay may receive, via a first wireless link with a base station, a scheduling request that identifies scheduling information for scheduling transmission or reception of data via a second wireless link with a network node. The wireless communication relay may transmit, via the second wireless link, a scheduling command in accordance with the scheduling information. The wireless communication relay may transmit or receive, via the second wireless link, the data in accordance with the scheduling information. Numerous other aspects are provided.Type: GrantFiled: October 8, 2020Date of Patent: September 19, 2023Assignee: QUALCOMM IncorporatedInventors: Karl Georg Hampel, Vincent Loncke, Junyi Li, Ashwin Sampath
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Patent number: 11671120Abstract: Certain aspects of the present disclosure generally relate to techniques for puncturing of structured low density parity check (LDPC) codes. A method for wireless communications by wireless node is provided. The method generally includes encoding a set of information bits based on a LDPC code to produce a code word, the LDPC code defined by a matrix having a first number of variable nodes and a second number of check nodes, puncturing the code word to produce a punctured code word, wherein the puncturing is performed according to a first puncturing pattern designed to puncture bits corresponding to one or more of the variable nodes having a certain degree of connectivity to the check nodes, and transmitting the punctured code word.Type: GrantFiled: September 14, 2020Date of Patent: June 6, 2023Assignee: QUALCOMM IncorporatedInventors: Shrinivas Kudekar, Se Yong Park, Alexandros Manolakos, Krishna Kiran Mukkavilli, Vincent Loncke, Joseph Binamira Soriaga, Jing Jiang, Thomas Joseph Richardson
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Patent number: 11349604Abstract: Certain aspects of the present disclosure relate to methods and apparatus for optimizing delivery of a transport block (TB) using code rate dependent segmentation.Type: GrantFiled: March 25, 2020Date of Patent: May 31, 2022Assignee: QUALCOMM IncorporatedInventors: Renqiu Wang, Jing Jiang, Joseph Binamira Soriaga, Thomas Joseph Richardson, Vincent Loncke
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Publication number: 20220083860Abstract: A method of optimizing an iterative process defines a set of trainable parameters and a differentiable gating function to be applied to each parameter in the set of trainable parameters. A trainable model of the iterative process is built, wherein the iterative process is modified by using the value of the differentiable gating function applied to the parameters to compute a weighted sum of internal variables of the iterative process before and after each iteration. A machine learning-based optimization of the trainable model of the iterative process determines a subset of iterations of the iterative process to perform. The subset of iterations is determined such that an accuracy and a number of active iterations of the iterative process are jointly optimized. The method processes only the subset of the iterations to perform the iterative process. The method is applied to optimize the layered belief propagation algorithm for LDPC decoding.Type: ApplicationFiled: September 16, 2021Publication date: March 17, 2022Inventors: Aaron Elazar KLEIN, Vincent LONCKE, Benjamin Zhong Xian TANG
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Patent number: 11277151Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.Type: GrantFiled: December 13, 2019Date of Patent: March 15, 2022Assignee: Qualcomm IncorporatedInventors: Joseph Binamira Soriaga, Gabi Sarkis, Shrinivas Kudekar, Thomas Richardson, Vincent Loncke
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Publication number: 20210112581Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless communication relay may receive, via a first wireless link with a base station, a scheduling request that identifies scheduling information for scheduling transmission or reception of data via a second wireless link with a network node. The wireless communication relay may transmit, via the second wireless link, a scheduling command in accordance with the scheduling information. The wireless communication relay may transmit or receive, via the second wireless link, the data in accordance with the scheduling information. Numerous other aspects are provided.Type: ApplicationFiled: October 8, 2020Publication date: April 15, 2021Inventors: Karl Georg HAMPEL, Vincent LONCKE, Junyi LI, Ashwin SAMPATH
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Publication number: 20200412387Abstract: Certain aspects of the present disclosure generally relate to techniques for puncturing of structured low density parity check (LDPC) codes. A method for wireless communications by wireless node is provided. The method generally includes encoding a set of information bits based on a LDPC code to produce a code word, the LDPC code defined by a matrix having a first number of variable nodes and a second number of check nodes, puncturing the code word to produce a punctured code word, wherein the puncturing is performed according to a first puncturing pattern designed to puncture bits corresponding to one or more of the variable nodes having a certain degree of connectivity to the check nodes, and transmitting the punctured code word.Type: ApplicationFiled: September 14, 2020Publication date: December 31, 2020Inventors: Shrinivas KUDEKAR, Se Yong PARK, Alexandros MANOLAKOS, Krishna Kiran MUKKAVILLI, Vincent LONCKE, Joseph Binamira SORIAGA, Jing JIANG, Thomas Joseph RICHARDSON
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Patent number: 10784901Abstract: Certain aspects of the present disclosure generally relate to techniques for puncturing of structured low density parity check (LDPC) codes. A method for wireless communications by wireless node is provided. The method generally includes encoding a set of information bits based on a LDPC code to produce a code word, the LDPC code defined by a matrix having a first number of variable nodes and a second number of check nodes, puncturing the code word to produce a punctured code word, wherein the puncturing is performed according to a first puncturing pattern designed to puncture bits corresponding to one or more of the variable nodes having a certain degree of connectivity to the check nodes, and transmitting the punctured code word.Type: GrantFiled: July 5, 2016Date of Patent: September 22, 2020Assignee: QUALCOMM IncorporatedInventors: Shrinivas Kudekar, Se Yong Park, Alexandros Manolakos, Krishna Kiran Mukkavilli, Vincent Loncke, Joseph Binamira Soriaga, Jing Jiang, Thomas Joseph Richardson
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Patent number: 10778366Abstract: Various aspects described herein relate to techniques for rate matching and interleaving in wireless communications (e.g., 5G NR). In an example, a method described herein includes encoding one or more information bits to generate a first codeblock, rate matching the first codeblock to generate a second codeblock, segmenting, using bit distribution, the second codeblock into one or more sub-blocks each having a plurality of bits. The method further includes interleaving the plurality of bits on each of the one or more sub-blocks, concatenating, using bit collection, the one or more sub-blocks to generate a third codeblock in response to the interleaving, and transmitting a signal using the third codeblock.Type: GrantFiled: March 29, 2018Date of Patent: September 15, 2020Assignee: QUALCOMM IncorporatedInventors: Vincent Loncke, Raghunath Kalavai, Yi Cao, Thomas Richardson, Joseph Binamira Soriaga, Shrinivas Kudekar
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Patent number: 10778371Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to a deeply-pipelined layered LDPC decoder architecture for high decoding throughputs. Accordingly, aspects of the present disclosure provide techniques for reducing delays in a processing pipeline by, in some cases, relaxing a dependency between updating bit log likelihood ratios (LLRs) and computing a posteriori LLRs.Type: GrantFiled: September 22, 2017Date of Patent: September 15, 2020Assignee: QUALCOMM IncorporatedInventors: Vincent Loncke, Girish Varatkar, Thomas Joseph Richardson, Yi Cao
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Publication number: 20200228239Abstract: Certain aspects of the present disclosure relate to methods and apparatus for optimizing delivery of a transport block (TB) using code rate dependent segmentation.Type: ApplicationFiled: March 25, 2020Publication date: July 16, 2020Inventors: Renqiu WANG, Jing JIANG, Joseph Binamira SORIAGA, Thomas Joseph RICHARDSON, Vincent LONCKE
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Publication number: 20200119749Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.Type: ApplicationFiled: December 13, 2019Publication date: April 16, 2020Inventors: Joseph Binamira SORIAGA, Gabi SARKIS, Shrinivas KUDEKAR, Thomas RICHARDSON, Vincent LONCKE
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Patent number: 10608785Abstract: Certain aspects of the present disclosure relate to methods and apparatus for optimizing delivery of a transport block (TB) using code rate dependent segmentation.Type: GrantFiled: January 17, 2018Date of Patent: March 31, 2020Assignee: QUALCOMM IncorporatedInventors: Renqiu Wang, Jing Jiang, Joseph Binamira Soriaga, Thomas Joseph Richardson, Vincent Loncke
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Patent number: 10560118Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.Type: GrantFiled: April 2, 2018Date of Patent: February 11, 2020Assignee: Qualcomm IncorporatedInventors: Joseph Binamira Soriaga, Gabi Sarkis, Shrinivas Kudekar, Thomas Richardson, Vincent Loncke
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Patent number: 10511328Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to an efficient list decoder for list decoding low density parity check (LDPC) codes.Type: GrantFiled: November 2, 2017Date of Patent: December 17, 2019Assignee: QUALCOMM IncorporatedInventors: Shrinivas Kudekar, Thomas Joseph Richardson, Gabi Sarkis, Vincent Loncke
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Patent number: 10476525Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may determine indices associated with m consecutive elements. In an aspect, each of the m consecutive elements may be associated with a different index. In addition, the apparatus may bit reverse a binary sequence associated with each of the m consecutive elements. In an aspect, each of the m consecutive elements may include a different binary sequence. Further, the apparatus may determine a bit-reversed order of the indices based at least in part on the bit-reversed binary sequence associated with each of the m elements. In addition, the apparatus may write each of the m consecutive elements to a different memory bank in parallel based at least in part on the bit-reversed order of the indices.Type: GrantFiled: September 14, 2017Date of Patent: November 12, 2019Assignee: QUALCOMM IncorporatedInventors: Gabi Sarkis, Hari Sankar, Vincent Loncke, Joseph Binamira Soriaga, Yang Yang
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Patent number: 10419027Abstract: Certain aspects of the present disclosure generally relate to techniques for efficient, high-performance decoding of low-density parity check (LDPC) codes, for example, by using an adjusted minimum-sum (AdjMS) algorithm, which involves approximating an update function and determining magnitudes of outgoing log likelihood ratios (LLRs). Similar techniques may also be used for decoding turbo codes. Other aspects, embodiments, and features (such as encoding technique) are also claimed and described.Type: GrantFiled: October 12, 2017Date of Patent: September 17, 2019Assignee: QUALCOMM IncorporatedInventors: Thomas Joseph Richardson, Shrinivas Kudekar, Vincent Loncke
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Patent number: 10340949Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.Type: GrantFiled: September 19, 2017Date of Patent: July 2, 2019Assignee: QUALCOMM IncorporatedInventors: Joseph Binamira Soriaga, Gabi Sarkis, Shrinivas Kudekar, Thomas Richardson, Vincent Loncke
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Patent number: 10312937Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to early termination techniques for low-density parity-check (LDPC) decoder architecture.Type: GrantFiled: June 9, 2017Date of Patent: June 4, 2019Assignee: QUALCOMM IncorporatedInventors: Vincent Loncke, Yi Cao, Girish Varatkar
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Publication number: 20180294917Abstract: Various aspects described herein relate to techniques for rate matching and interleaving in wireless communications (e.g., 5G NR). In an example, a method described herein includes encoding one or more information bits to generate a first codeblock, rate matching the first codeblock to generate a second codeblock, segmenting, using bit distribution, the second codeblock into one or more sub-blocks each having a plurality of bits. The method further includes interleaving the plurality of bits on each of the one or more sub-blocks, concatenating, using bit collection, the one or more sub-blocks to generate a third codeblock in response to the interleaving, and transmitting a signal using the third codeblock.Type: ApplicationFiled: March 29, 2018Publication date: October 11, 2018Inventors: Vincent Loncke, Raghunath Kalavai, Yi Cao, Thomas Richardson, Joseph Binamira Soriaga, Shrinivas Kudekar