Patents by Inventor Vincent P. Peterson, III

Vincent P. Peterson, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices
    Patent number: 6391669
    Abstract: Multilayer substrates, are fabricated with the incorporation therein of non-destructive test structures utilized to provide visual and electrical test data to facilitate the ascertainment and assessment of potential electrical interface failures. Furthermore, there are provided embedded structures in multilayer substrates, such as are employed in chip carrier packaging, so as to facilitate electrical testing for via to via alignment and interface layer alignment, and to enable the testing of conductive interface electrical integrity of multilayer electrical devices.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: May 21, 2002
    Assignee: International Business Machines Corporation
    Inventors: Benjamin V. Fasano, Hai P. Longworth, Vincent P. Peterson, III, Anthony L. Plachy, Robert N. Wiggin