Patents by Inventor Vincent W. Trimeloni

Vincent W. Trimeloni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10063149
    Abstract: A module stack includes a lower module, a middle module above the lower module, and an upper module above the middle module. The lower module has power stage control circuitry configured to convert a PWM input signal into phase driver control signals, and power stages to be controlled by the phase driver control signals, respectively. The middle module has phase inductors each having a respective winding and a respective magnetic core. The respective winding has one end joined to a respective one of the power stages in the lower module and another end joined to a common node in the middle module. The upper module has a current sense resistor that has one end joined to the common node in the middle module and another end joined to an output node in the upper module. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: August 28, 2018
    Assignee: Apple Inc.
    Inventors: Sunil M. Akre, Suresh B. Kariyadan, Vincent W. Trimeloni
  • Publication number: 20180145594
    Abstract: A module stack includes a lower module, a middle module above the lower module, and an upper module above the middle module. The lower module has power stage control circuitry configured to convert a PWM input signal into phase driver control signals, and power stages to be controlled by the phase driver control signals, respectively. The middle module has phase inductors each having a respective winding and a respective magnetic core. The respective winding has one end joined to a respective one of the power stages in the lower module and another end joined to a common node in the middle module. The upper module has a current sense resistor that has one end joined to the common node in the middle module and another end joined to an output node in the upper module. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 23, 2017
    Publication date: May 24, 2018
    Inventors: Sunil M. Akre, Suresh B. Kariyadan, Vincent W. Trimeloni