Abstract: An electronic device is disclosed, including a first set of processor cores including at least one processor core and a second set of processor cores including at least one processor core. The electronic device is configured such that during initialization of the electronic device: the first set of processor cores executes first initialization instructions in a first execution environment, the second set of processor cores executes second initialization instructions in a second execution environment, and the first set and the second set at least one of read or write to a shared register.

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine version information for a new firmware component, read dependency information corresponding to the firmware component, and determine if dependency is satisfied between the new firmware component and one or more other firmware components based on the version information and the dependency information of the new firmware component. Other embodiments are disclosed and claimed.

Abstract: A system management mode (SMM) runtime resiliency manager (SRM) augments computing resource protection policies provided by an SMM policy shim. The SMM shim protects system resources by deprivileging system management interrupt (SMI) handlers to a lower level of privilege (e.g., ring 3 privilege) and by configuring page tables and register bitmaps (e.g., I/O, MSR, and Save State register bitmaps). SRM capabilities include protecting the SMM shim, updating the SMM shim, protecting a computing system during SMM shim update, detecting SMM attacks, and recovering attacked or faulty SMM components.

Abstract: Methods, apparatus, and articles of manufacture to conditionally activate a big core in a computing system are disclosed. An example apparatus including instructions stored in the apparatus; and processor circuitry to execute the instructions to: in response to a request to operate two or more processing devices as a single processing device, determine whether the two or more processing devices are available and capable of executing instructions according to the request; when the two or more processing devices are available and capable: split the instructions into first sub-instructions and second sub-instructions; provide (a) the first sub-instructions to a first processing device of the two or more processing devices and (b) the second sub-instructions to a second processing device of the two or more processing devices; and generate an output by combining a first output of the first processing device and a second output of the second processing device.

Abstract: Various examples relate to a control apparatus, a control device, a method, and a computer program for managing repair of a memory circuitry, and to a corresponding computing device. The control apparatus comprises processing circuitry configured to determine a score of a memory failure probability of at least one memory cell of the memory circuitry and trigger a repair procedure of the at least one memory cell of the memory circuitry when the score reaches a threshold.

Abstract: During a computing system boot sequence, reference firmware provided by a computing system component supplies Advanced Configuration and Power Interface (ACPI) code that generates ACPI tables and definition blocks to a bootloader. During a boot sequence, the reference firmware receives an indication from the bootloader which components the reference firmware is to initialize. As part of component initialization performed by the reference firmware, the reference firmware populates hand-off data structures (e.g., hand-off blocks (HOBs)) with ACPI code (AML code) that, when executed by the bootloader, generates and populates ACPI tables (e.g., DSDT and SSDT tables) and definition blocks with information pertinent to the initialization and runtime management of computing system components. Component initialization and runtime configuration workarounds can be implemented in the bootloader incorporating reference firmware updates provided by the component vendor.

Abstract: Systems, apparatuses and methods may provide for technology that detects an over current condition associated with a voltage regulator in a computing system, identifies a configurable over current protection policy associated with the voltage regulator, and automatically takes a protective action based on the configurable over current protection policy. In one example, the protective action includes one or more of a frequency throttle of a processor coupled to the voltage regulator in isolation from one or more additional processors in the computing system, a deactivation of the processor in isolation from the one or more additional processors, an issuance of a virtual machine monitor notification, an issuance of a data center fleet manager notification, or an initiation of a migration of a workload from the processor to at least one of the additional processor(s).

Abstract: Systems, apparatuses and methods may provide for technology that identifies, during a first boot process, whether at least one task associated with at least one software program is set to occur in a single-threaded process or a multithreaded process, in response to the at least one task being set to occur in the multithreaded process, executing the at least one task in the multithreaded process during the first boot process, and in response to the at least one task being set to occur in the single-threaded process, executing the at least one task in the single-threaded process during the first boot process.

Abstract: Various examples relate to an apparatus, device, method, and computer program for extending instructions supported by a processor. The apparatus is configured to identify at least a part of a computer program targeting an instruction unsupported by a pre-defined set of instructions of an Instruction Set Architecture (ISA) of the processor. The apparatus is configured to extend the instructions supported by the processor, based on the targeted unsupported instruction. The apparatus is configured to execute the computer program.

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.

Abstract: The technology disclosed herein includes getting a system update configuration for managing updating of at least one of a software component and a firmware component of a computing system powered by a battery; determining an estimated system update time of usage of the battery to update the at least one of the software component and the firmware component based at least in part on the system update configuration; updating the at least one of the software component and the firmware component when resource requirements of the system update configuration are met and the estimated system update time is less than or equal to a minimum remaining time of usage of the battery; and deferring the updating when the resource requirements of the system update configuration are not met or the estimated system update time is greater than the minimum remaining time of usage of the battery.

Abstract: Various examples of the present disclosure relate to a computing device, and to a method and computer program for initializing a computing device. The computing device comprises a memory device, configured to store firmware for at least a first processing unit and a second processing unit. The computing device comprises a first processing unit, configured to obtain the firmware for the first processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device. The computing device comprises a second processing unit, configured to obtain the firmware for the second processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device.

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine version information for a new firmware component, read dependency information corresponding to the firmware component, and determine if dependency is satisfied between the new firmware component and one or more other firmware components based on the version information and the dependency information of the new firmware component. Other embodiments are disclosed and claimed.

Abstract: Various examples relate to an apparatus, device, method, and computer program for extending instructions sup-ported by a processor. The apparatus is configured to identify at least a part of a computer program targeting an instruction unsupported by a pre-defined set of instructions of an Instruction Set Architecture (ISA) of the processor. The apparatus is configured to extend the instructions supported by the processor, based on the targeted unsupported instruction. The apparatus is configured to execute the computer program.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement a multiprocessor boot flow for a faster boot process are described. In one embodiment, a system includes a hardware processor comprising a processor core, a cache coupled to the hardware processor, storage for hardware initialization code, and a controller circuit to initialize a portion of the cache as memory for usage by the hardware initialization code before beginning execution of the hardware initialization code after a power on of the system.

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine version information for a new firmware component, read dependency information corresponding to the firmware component, and determine if dependency is satisfied between the new firmware component and one or more other firmware components based on the version information and the dependency information of the new firmware component. Other embodiments are disclosed and claimed.

Abstract: An apparatus to facilitate at-scale telemetry using interactive matrix for deterministic microservices performance is disclosed. The apparatus includes one or more processors to: receive user input comprising an objective or task corresponding to scheduling a microservice for a service, wherein the objective or task may include QoS, SLO, ML feedback; identify interaction matrix components in an interaction matrix that match the objective or tasks for the microservice; identify knowledgebase components in knowledgebase that match the objective or tasks for the microservice; and determine a scheduling operation for the microservice, the scheduling operation to deploy the microservice in a configuration that is in accordance with the objective or task, wherein the configuration comprises a set of hardware devices and microservice interaction points determined based on the interaction matrix components and the knowledgebase components.

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.

Abstract: It is proposed an apparatus, the apparatus comprising interface circuitry, machine-readable instructions, and a semiconductor die comprising processing circuitry to execute the machine-readable instructions to obtain data associated with the processing circuitry, and store the data in non-volatile memory integrated into the semiconductor die.

Abstract: Embodiments are directed to improving boot process for early display initialization and visualization. An embodiment of a system includes a plurality of processor cores; a cache coupled to the plurality of processor cores; and a controller circuit to: initialize a portion of the cache as static memory for hardware initialization code usage before beginning execution of the hardware initialization code after a power on of the hardware processor; and cause initialization of a display device to be performed using the portion of the cache, the initialization of the display device performed independently of initialization of dynamic memory of the hardware processor.