Patents by Inventor Vincenzo Enea

Vincenzo Enea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030300
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Application
    Filed: May 24, 2023
    Publication date: January 25, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Vincenzo ENEA
  • Publication number: 20230268421
    Abstract: A MOS transistor of vertical-conduction, trench-gate, type, including a first and a second spacer adjacent to portions of a gate oxide of the trench-gate protruding from a semiconductor substrate, the first and second spacers being specular to one another with respect to an axis of symmetry; enriched P+ regions are formed by implanting dopant species within the body regions using the spacers as implant masks. The formation of symmetrical spacers makes it possible to form source, body and body-enriched regions that are auto-aligned with the gate electrode, overcoming the limitations of MOS transistors of the known type in which such regions are formed by means of photolithographic techniques (with a consequent risk of asymmetry).
    Type: Application
    Filed: February 13, 2023
    Publication date: August 24, 2023
    Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS PTE LTD
    Inventors: Vincenzo ENEA, Voon Cheng NGWAN
  • Patent number: 11705493
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: July 18, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventor: Vincenzo Enea
  • Publication number: 20210273066
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Vincenzo ENEA
  • Patent number: 11038032
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: June 15, 2021
    Assignee: STMICROELECTRONICS S.r.l.
    Inventor: Vincenzo Enea
  • Publication number: 20200373397
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Inventor: Vincenzo ENEA
  • Patent number: 10770558
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: September 8, 2020
    Assignee: STMICROELECTRONICS S.r.l.
    Inventor: Vincenzo Enea
  • Publication number: 20200083337
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventor: Vincenzo ENEA
  • Patent number: 10510849
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: December 17, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Vincenzo Enea
  • Publication number: 20180342593
    Abstract: A MOS transistor, in particular a vertical channel transistor, includes a semiconductor body housing a body region, a source region, a drain electrode and gate electrodes. The gate electrodes extend in corresponding recesses which are symmetrical with respect to an axis of symmetry of the semiconductor body. The transistor also has spacers which are also symmetrical with respect to the axis of symmetry. A source electrode extends in electrical contact with the source region at a surface portion of the semiconductor body surrounded by the spacers and is in particular adjacent to the spacers. During manufacture the spacers are used to form in an auto-aligning way the source electrode which is symmetrical with respect to the axis of symmetry and equidistant from the gate electrodes.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 29, 2018
    Inventor: Vincenzo ENEA
  • Publication number: 20160166601
    Abstract: The present invention relates to the use of xanthan gum as re-epithelializing agent and, in particular, to a pharmaceutical formulation comprising xanthan gum as a re-epithelializing active principle eventually mixed with hyaluronic acid. Said use and composition speed up and improve advantageously the formation of newly grown epithelium.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 16, 2016
    Inventors: Maria Grazia Mazzone, Grazia Paladino, Clara Marino, Ornella Peri, Vincenzo Enea
  • Patent number: 8912164
    Abstract: The present invention relates to a pharmaceutical formulation comprising xanthan gum as a re-epithelializing active principle optionally mixed with hyaluronic acid. The composition speeds up and improves advantageously the formation of newly grown epithelium.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: December 16, 2014
    Assignee: SIFI S.p.A.
    Inventors: Maria Grazia Mazzone, Grazia Paladino, Clara Marino, Ornella Peri, Vincenzo Enea
  • Patent number: 8420454
    Abstract: An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device coupled in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal coupled to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, coupled between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal coupled to the control terminal; and a Zener diode, coupled between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: April 16, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cesare Ronsisvalle, Vincenzo Enea
  • Patent number: 7982528
    Abstract: An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: July 19, 2011
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Cesare Ronsisvalle, Vincenzo Enea
  • Publication number: 20110129967
    Abstract: An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.
    Type: Application
    Filed: January 31, 2011
    Publication date: June 2, 2011
    Applicant: STMicroelectronics S.r.I.
    Inventors: Cesare RONSISVALLE, Vincenzo ENEA
  • Patent number: 7936047
    Abstract: A method realizes a contact of a first well of a first type of dopant integrated in a semiconductor substrate next to a second well of a second type of dopant and forming with it a parasitic diode. The method comprises: formation of the first well; formation of the second well next to the first well; definition of an oxide layer above the first and second wells; and formation of an electric contact layer above the oxide layer in correspondence with the first well for realizing an electric contact with it. The definition step of the oxide layer further comprises a deposition step of this oxide layer above the whole first well and a removal step of at least one portion of the oxide layer in correspondence with a contact area of the first well so that the contact area has a shorter length than a length of the first well.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: May 3, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vincenzo Enea, Cesare Ronsisvalle
  • Patent number: 7868382
    Abstract: A power actuator of the emitter-switched type is described, the power actuator comprising at least one high voltage bipolar transistor and a low voltage DMOS transistor connected in cascode configuration between a collector terminal of the bipolar transistor and a source terminal of the DMOS transistor and having respective control terminals. Advantageously, the power actuator further comprises at least a Zener diode, inserted between the source terminal of the DMOS transistor and the control transistor of the bipolar transistor.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: January 11, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cesare Ronsisvalle, Vincenzo Enea
  • Publication number: 20100001783
    Abstract: An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.
    Type: Application
    Filed: May 18, 2006
    Publication date: January 7, 2010
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Cesare Ronsisvalle, Vincenzo Enea
  • Publication number: 20080246118
    Abstract: A method realizes a contact of a first well of a first type of dopant integrated in a semiconductor substrate next to a second well of a second type of dopant and forming with it a parasitic diode. The method comprises: formation of the first well; formation of the second well next to the first well; definition of an oxide layer above the first and second wells; and formation of an electric contact layer above the oxide layer in correspondence with the first well for realizing an electric contact with it. The definition step of the oxide layer further comprises a deposition step of this oxide layer above the whole first well and a removal step of at least one portion of the oxide layer in correspondence with a contact area of the first well so that the contact area has a shorter length than a length of the first well.
    Type: Application
    Filed: February 28, 2008
    Publication date: October 9, 2008
    Applicant: STMicroelectronics S.r.l.
    Inventors: Vincenzo Enea, Cesare Ronsisvalle
  • Publication number: 20080169506
    Abstract: A power actuator of the emitter-switched type is described, the power actuator comprising at least one high voltage bipolar transistor and a low voltage DMOS transistor connected in cascode configuration between a collector terminal of the bipolar transistor and a source terminal of the DMOS transistor and having respective control terminals. Advantageously, the power actuator further comprises at least a Zener diode, inserted between the source terminal of the DMOS transistor and the control transistor of the bipolar transistor.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 17, 2008
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Cesare Ronsisvalle, Vincenzo Enea