Patents by Inventor Vincenzo Ferragina

Vincenzo Ferragina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Erase techniques and circuits therefor for non-volatile memory devices
    Patent number: 9349480
    Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: May 24, 2016
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli, Simone Bartoli
  • Erase Techniques and Circuits Therefor for Non-Volatile Memory Devices
    Publication number: 20140293707
    Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 2, 2014
    Inventors: Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli, Simone Bartoli
  • Erase techniques and circuits therefor for non-volatile memory devices
    Patent number: 8705283
    Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: April 22, 2014
    Inventors: Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli, Simone Bartoli
  • ERASE TECHNIQUES AND CIRCUITS THEREFOR FOR NON-VOLATILE MEMORY DEVICES
    Publication number: 20130016564
    Abstract: Disclosed herein is a method that comprises applying a first voltage to a memory cell, applying again the first voltage to the memory cell when the memory cell have not been shifted to an erased condition, and applying a second voltage to the memory cell when the memory cell have not still been shifted to an erased condition, the second voltage being higher than the first voltage.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 17, 2013
    Applicant: Elpida Memory, Inc.
    Inventors: Vincenzo Ferragina, Stefano Surico, Giuseppe Moioli, Simone Bartoli