Patents by Inventor Vincenzo PUSINO

Vincenzo PUSINO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of fabricating a monolithic sensor device from a layered structure
    Patent number: 11056531
    Abstract: A method of fabricating a field-effect transistor in which a native oxide layer is removed prior to etching a gate recess. The cleaning step ensures that the etch of the gate recess starts at the same time across an entire sample, such that a uniform gate recess depth and profile can be achieved across an array of field-effect transistors. This results in a highly uniform switch-off voltage for the field-effect transistors in the array.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: July 6, 2021
    Assignee: The University Court of the University of Glasgow
    Inventors: David Robert Sime Cumming, Chengzhi Xie, Vincenzo Pusino
  • METHOD OF FABRICATING A MONOLITHIC SENSOR DEVICE FROM A LAYERED STRUCTURE
    Publication number: 20200168659
    Abstract: A method of fabricating a field-effect transistor in which a native oxide layer is removed prior to etching a gate recess. The cleaning step ensures that the etch of the gate recess starts at the same time across an entire sample, such that a uniform gate recess depth and profile can be achieved across an array of field-effect transistors. This results in a highly uniform switch-off voltage for the field-effect transistors in the array.
    Type: Application
    Filed: June 1, 2018
    Publication date: May 28, 2020
    Applicant: The University Court of the University of Glasgow
    Inventors: David Robert Sime CUMMING, Chengzhi XIE, Vincenzo PUSINO