Patents by Inventor Vincenzo Sambataro

Vincenzo Sambataro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7414459
    Abstract: An architecture for implementing an integrated capacity includes a capacitive block inserted between first and second voltage reference. The block is formed The block is formed from elementary capacitive modules. An enable block is inserted between the first voltage reference and the capacitive block and includes switches connected to the elementary capacitive modules and driven on their control terminals by control signals. Each switch of the enable block is inserted between the first voltage reference and a first end of a corresponding elementary capacitive module. A verify and enable circuit is connected to the first voltage reference, as well as at the input of the first end of the elementary capacitive modules and at the output of the control terminals of the switches of the enable block.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: August 19, 2008
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michelangelo Pisasale, Vincenzo Sambataro, Maurizio Gaibotti, Michele La Placa
  • Patent number: 7403441
    Abstract: A power management unit for a non-volatile memory device is proposed. The power management unit includes means for providing a reference voltage, resistive means for deriving a reference current from the reference voltage, means for generating a plurality of operative voltages from a power supply voltage, and means for regulating the operative voltages; in the power management unit of the invention, for each operative voltage the means for regulating includes means for deriving a scaled reference current from the reference current according to a scaling factor, further resistive means for deriving a rating voltage from the scaled reference current, means for deriving a measuring voltage from the operative voltage and the rating voltage, and means for controlling the operative voltage according to a comparison between the measuring voltage and the reference voltage.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: July 22, 2008
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Enrico Castaldo, Antonino Conte, Salvatore Torrisi, Vincenzo Sambataro
  • Publication number: 20070024123
    Abstract: An architecture for implementing an integrated capacity advantageously includes a capacitive block inserted between a first and a second voltage reference. The block is formed from elementary capacitive modules. An enable block is inserted between the first voltage reference and the capacitive block and includes switches connected to the elementary capacitive modules and driven on their control terminals by control signals. Each switch of the enable block is inserted between the first voltage reference and a first end of a corresponding elementary capacitive module. A verify and enable circuit is connected to the first voltage reference, as well as at the input of the first end of the elementary capacitive modules and at the output of the control terminals of the switches of the enable block.
    Type: Application
    Filed: May 31, 2006
    Publication date: February 1, 2007
    Applicant: STMicroelectronics S.r.I.
    Inventors: Michelangelo Pisasal, Vincenzo Sambataro, Maurizio Giabotti, Michele La Placa
  • Publication number: 20060119383
    Abstract: A power management unit for a non-volatile memory device is proposed. The power management unit includes means for providing a reference voltage, resistive means for deriving a reference current from the reference voltage, means for generating a plurality of operative voltages from a power supply voltage, and means for regulating the operative voltages; in the power management unit of the invention, for each operative voltage the means for regulating includes means for deriving a scaled reference current from the reference current according to a scaling factor, further resistive means for deriving a rating voltage from the scaled reference current, means for deriving a measuring voltage from the operative voltage and the rating voltage, and means for controlling the operative voltage according to a comparison between the measuring voltage and the reference voltage.
    Type: Application
    Filed: February 22, 2005
    Publication date: June 8, 2006
    Inventors: Enrico Castaldo, Antonino Conte, Salvatore Torrisi, Vincenzo Sambataro