Patents by Inventor Vincenzo Stornelli

Vincenzo Stornelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230327452
    Abstract: The present invention is in the field of a switching matrix for reconfigurable PV modules and systems, in order to compensate for sub-optimal functioning cells, such as due to shading, by automatically interconnecting cells and/or blocks to optimize output power of a PV-module or modules or systems.
    Type: Application
    Filed: March 25, 2021
    Publication date: October 12, 2023
    Applicant: TECHNISCHE UNIVERSITEIT DELFT
    Inventors: Miroslav ZEMAN, Olindo ISABELLA, Andres CALCABRINI, Vincenzo STORNELLI, Mirco MUTTILLO
  • Patent number: 9252744
    Abstract: An electronic circuit simulating the behavior of an inductance between a respective input node and a reference potential. The electronic circuit comprises a compensation network electrically connected between ground and a source potential and an inverting amplification stage electrically connected to the output of the compensation network. The inverting amplification stage comprises a transistor having a control terminal connected to the input of the inverting amplification stage, a first bias terminal operatively connected to the output of the inverting amplification stage, and a second bias terminal operatively connected to ground. The inverting amplification stage further comprises a feedback capacitance interposed between the first bias terminal and the control terminal of the transistor, and a feedback inductance interposed between the second bias terminal of the transistor and ground.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: February 2, 2016
    Assignee: Universita' Degli Studi Dell'Aquila
    Inventors: Giorgio Leuzzi, Vincenzo Stornelli, Paolo Colucci, Leonardo Pantoli
  • Publication number: 20140292448
    Abstract: An electronic circuit simulating the behavior of an inductance between a respective input node and a reference potential. The electronic circuit comprises a compensation network electrically connected between ground and a source potential and an inverting amplification stage electrically connected to the output of the compensation network. The inverting amplification stage comprises a transistor having a control terminal connected to the input of the inverting amplification stage, a first bias terminal operatively connected to the output of the inverting amplification stage, and a second bias terminal operatively connected to ground. The inverting amplification stage further comprises a feedback capacitance interposed between the first bias terminal and the control terminal of the transistor, and a feedback inductance interposed between the second bias terminal of the transistor and ground.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Applicant: Universita' Degli Studi Dell'Aquila
    Inventors: Giorgio Leuzzi, Vincenzo Stornelli, Paolo Colucci, Leonardo Pantoli