Patents by Inventor VINEET KUMAR GARG
VINEET KUMAR GARG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250184023Abstract: Aspects of the subject disclosure may include, for example, a device, including: a processing system including a processor; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: receiving an indication of a priority level of an interworking function used by a boundary clock node; and selecting a best master clock using an algorithm that considers the priority level of the boundary clock node. Other embodiments are disclosed.Type: ApplicationFiled: January 18, 2024Publication date: June 5, 2025Applicant: CIENA CORPORATIONInventors: Sharad Kumar Srivastava, Vineet Kumar Garg, Krishan Singh, Vikas Joshi
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Publication number: 20250184024Abstract: Aspects of the subject disclosure may include, for example, a device that includes a processing system including a processor; a clock; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: advertising a capability as a precision timing protocol (PTP) master clock through an Internet Protocol (IP) network, wherein the advertising includes an IP address of the device; receiving a unicast signaling mechanism from a PTP client node in the network; and sending clock messages to the PTP client node responsive to accepting the PTP client node. Other embodiments are disclosed.Type: ApplicationFiled: January 23, 2024Publication date: June 5, 2025Applicant: CIENA CORPORATIONInventors: Sharad Kumar Srivastava, Vineet Kumar Garg, Krishan Singh, Vijendra Singh Chauhan
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Publication number: 20250184025Abstract: Aspects of the subject disclosure may include, for example, a device, including: a processing system including a processor; a clock; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: advertising via Border Gateway Protocol (BGP) a capability as a precision timing protocol (PTP) master clock through an Internet Protocol (IP)/Multi-Protocol Label Switching (MPLS) network, wherein the advertising includes an IP address of the device; receiving a unicast signaling mechanism from a PTP client node in the network; and sending clock messages to the PTP client node responsive to accepting the PTP client node. Other embodiments are disclosed.Type: ApplicationFiled: January 30, 2025Publication date: June 5, 2025Applicant: CIENA CORPORATIONInventors: Sharad Kumar Srivastava, Vineet Kumar Garg, Krishan Singh, Vijendra Singh Chauhan
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Patent number: 11444747Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: GrantFiled: November 23, 2020Date of Patent: September 13, 2022Assignee: CISCO TECHNOLOGY, INC.Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Publication number: 20210075585Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: ApplicationFiled: November 23, 2020Publication date: March 11, 2021Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Patent number: 10873442Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: GrantFiled: October 2, 2019Date of Patent: December 22, 2020Assignee: CISCO TECHNOLOGY, INC.Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Publication number: 20200036506Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: ApplicationFiled: October 2, 2019Publication date: January 30, 2020Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Patent number: 10484163Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: GrantFiled: October 13, 2017Date of Patent: November 19, 2019Assignee: CISCO TECHNOLOGY, INC.Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Publication number: 20190116021Abstract: The present technology improves synchronization of a slave node with a master node in a network using PTP packets in which the slave node is coupled to the working master node through at least one boundary node. The technology establishes a synchronization communication session between the boundary node and the slave node in which the synchronization communication session is configured to measure a first timing delay from the boundary node to the slave node, and establishes a transparent communication session between the master node and the slave node through the boundary timing node in which the transparent communication session configured to measure a second timing delay from the master node to the slave node. Using the sessions, the technology adjusts a timing delay correction factor according to the first timing delay and the second timing delay, and synchronizes the slave node with the master node according to the correction factor.Type: ApplicationFiled: October 13, 2017Publication date: April 18, 2019Inventors: Anshul Tanwar, Vineet Kumar Garg, N V Hari Krishna N
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Patent number: 9819541Abstract: In one embodiment, a technique for implementing precision time protocol (PTP) over a packet transport (e.g., IPv4, IPv6, etc.) with clock redundancy is provided. The technique may involve maintaining clock synchronization by a PTP node, where the PTP node participates in an exchange of one or more messages with a current master node and at least one connected node that is a slave to the PTP node. The technique may also involve detecting one or more conditions that prompt a switch to a new master PTP node. The technique may further involve selecting the new master PTP node, and determining, based on the selection, whether the new master PTP node is a slave to the PTP node. The technique may yet further involve taking action, based on the determination, to indicate to the new master PTP node that the PTP node is not a suitable master.Type: GrantFiled: June 24, 2015Date of Patent: November 14, 2017Assignee: Cisco Technology, Inc.Inventors: Vineet Kumar Garg, Naga Venkata Hari Krishna Nandipati
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Publication number: 20160277138Abstract: In one embodiment, a technique for implementing precision time protocol (PTP) over a packet transport (e.g., IPv4, IPv6, etc.) with clock redundancy is provided. The technique may involve maintaining clock synchronization by a PTP node, where the PTP node participates in an exchange of one or more messages with a current master node and at least one connected node that is a slave to the PTP node. The technique may also involve detecting one or more conditions that prompt a switch to a new master PTP node. The technique may further involve selecting the new master PTP node, and determining, based on the selection, whether the new master PTP node is a slave to the PTP node. The technique may yet further involve taking action, based on the determination, to indicate to the new master PTP node that the PTP node is not a suitable master.Type: ApplicationFiled: June 24, 2015Publication date: September 22, 2016Inventors: VINEET KUMAR GARG, Naga Venkata Hari Krishna NANDIPATI