Patents by Inventor Vineethkumar Nair

Vineethkumar Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220111471
    Abstract: Aspects of the technology employ real-time monitoring and feedback for a printed circuit board fabrication system. An x-ray simulator can be used to aid in understanding metallurgical phase transformations in real time to ensure acceptable and reliable solder connections. This includes real-time data gathering and evaluation of solder-related printed circuit board data, including peak temperature, time above liquidus (TAL), ramp up and ramp down rates. Such information is used to identify the exact melting point and view specific soldering behavior in order to achieve an optimized soldering solution. This approach can provide effective solder joint analysis, which can reduce the likelihood of failure of a circuit board intended to operate in extreme environments for an extended period of time, such as the stratosphere.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: LOON LLC.
    Inventors: Vineethkumar Nair, Keith Fries
  • Publication number: 20220007518
    Abstract: Aspects of the technology employ significantly reduce void formation beneath critical components on a printed circuit board (PCB). This is accomplished using advanced fabrication techniques that include employing alignment fixtures and solder standoffs to position duplexers, using nitrogen gas during the reflow process, and maintaining specific temperature and “time above liquideous” (TAL) controls. Certain types of components, such as duplexers used in communication circuit boards, can be highly susceptible to voids. Because such components are relatively large and block x-rays, it is challenging to determine whether voids have been formed beneath them. Thus, in many instances conventional fabrication techniques are insufficient to produce viable circuit boards that minimize void formation within acceptable tolerances.
    Type: Application
    Filed: July 1, 2020
    Publication date: January 6, 2022
    Inventors: Keith Fries, Vineethkumar Nair