Patents by Inventor Vinod John

Vinod John has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113321
    Abstract: The present invention relates to lithium ion cells and specifically to lower capacity (3-10 Ah) elliptic cylindrical lithium ion cells with individual positive and negative terminals projecting from the top of the cell. In particular, the present invention relates to lower capacity elliptic cylindrical lithium ion cells with plastic compression seals, and method of processing them. The cells of the present application exhibit good charge retention and low internal resistance and can be employed for mission critical applications viz. powering satellites, launch vehicles, military vehicles, submarines and electric vehicles.
    Type: Application
    Filed: February 3, 2022
    Publication date: April 4, 2024
    Inventors: Aravamuthan S, Mercy TD, Vijayakumar PS, Aiswarya SAMRIDH, Bibin JOHN, Arjun RAJ M, Deepak SRIVASTAVA, Jamal Nawaz ANSARI, MD, Vijayakumar K, Vidur Rajesh PALIWAL, Vinod V, Padmakumar S, Rajesh KUMAR MR, Sunil K, Saju KT, Jineesh P, Bineeshlal K
  • Publication number: 20230352235
    Abstract: Present disclosure discloses a simple litz planar architecture using minimal vias for reducing Alternating Current (AC) resistance. The simple litz planar structure comprises a plurality of conductor strands of a first layer, a plurality of conductor strands of a second layer; and a plurality of vias set. The first layer and the second layer are separated by an insulating layer and each vias set is configured to perform transposition between a corresponding conductor strand of the first layer and a conductor strand of the second layer. The disclosed transposition method is simple, easy to manufacture and consequently, cost effective. The reduction in AC resistance obtained using disclosed simple litz planar structure is similar to planar litz winding. Further reduction in AC resistance is obtained by implementing multi-transposition per layer in the disclosed simple litz winding structure.
    Type: Application
    Filed: April 10, 2023
    Publication date: November 2, 2023
    Inventors: SUBHASH JOSHI THARAYPARAMBIL GEORGE, RENJI VARGHESE CHACKO, AKHILA ELAPPULLY MANIKANDAN, SEENA SOMARAJAN, VINOD JOHN, ANURAG SINGH
  • Publication number: 20180109188
    Abstract: The present invention provides a hybrid combination of GaN transistor and Si transistor that are connected in an unique manner in a synchronous DC-DC power converter. The GaN transistor acts as active switch and the Si transistor acts as synchronous diode to reduce the power loss in a DC-DC power converter.
    Type: Application
    Filed: August 4, 2017
    Publication date: April 19, 2018
    Applicant: INDIAN INSTITUTE OF SCIENCE
    Inventors: Mohammad Hassan HEDAYATI, Vinod JOHN
  • Patent number: 8331071
    Abstract: A distributed energy resource (DER) switching system and method for connecting a DER to an electrical power system (EPS) protector, wherein the DER has a reactance-to-resistance ratio higher than the reactance-to-resistance ratio of the EPS protector. The DER switching system includes an input for receiving power from the DER, and an output for providing power from the DER to the EPS protector. The DER switching system is designed to effectively lower the higher reactance-to-resistance ratio of the DER during an over-current fault so that, during the fault, the effective reactance-to-resistance ratio at the output of the DER switching system is lower than the reactance-to-resistance ratio of the EPS protector. The method includes effectively lowering the reactance-to-resistance ratio of the DER by varying the operating state of a switching device in a controlled manner during the fault.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: December 11, 2012
    Assignee: Northern Power Systems Utility Scale, Inc.
    Inventors: Eric L. Benedict, Vinod John
  • Publication number: 20100314936
    Abstract: A distributed energy resource (DER) switching system and method for connecting a DER to an electrical power system (EPS) protector, wherein the DER has a reactance-to-resistance ratio higher than the reactance-to-resistance ratio of the EPS protector. The DER switching system includes an input for receiving power from the DER, and an output for providing power from the DER to the EPS protector. The DER switching system is designed to effectively lower the higher reactance-to-resistance ratio of the DER during an over-current fault so that, during the fault, the effective reactance-to-resistance ratio at the output of the DER switching system is lower than the reactance-to-resistance ratio of the EPS protector. The method includes effectively lowering the reactance-to-resistance ratio of the DER by varying the operating state of a switching device in a controlled manner during the fault.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 16, 2010
    Applicant: NORTHERN POWER SYSTEMS, INC.
    Inventors: Eric L. Benedict, Vinod John
  • Patent number: 7355309
    Abstract: In order to provide a less expensive generator, a rotor using nonmagnetic beams is disclosed. The rotor includes a magnetic steel rim connected to a main generator shaft by a hub. The magnetic rim supports the components of the rotor, which includes a plurality of magnets and pole pieces. The pole pieces are connected to the rim with non-magnetic standoffs and nonmagnetic fasteners. The magnets are supported radially by nonmagnetic beams. The magnets are retained tangentially by pole pieces and radially by wedges. The components of the rotor are further retained axially between plates coupled to the rim and a shoulder on the pole pieces.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 8, 2008
    Assignee: Northern Power Systems, Inc.
    Inventors: Daniel Costin, Vinod John
  • Patent number: 7016793
    Abstract: An apparatus for anti-islanding protection of a distributed generation with respect to a feeder connected to an electrical grid is disclosed. The apparatus includes a sensor adapted to generate a voltage signal representative of an output voltage and/or a current signal representative of an output current at the distributed generation, and a controller responsive to the signals from the sensor. The controller is productive of a control signal directed to the distributed generation to drive an operating characteristic of the distributed generation out of a nominal range in response to the electrical grid being disconnected from the feeder.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: March 21, 2006
    Assignee: General Electric Company
    Inventors: Zhihong Ye, Vinod John, Changyong Wang, Luis Jose Garces, Rui Zhou, Lei Li, Reigh Allen Walling, William James Premerlani, Peter Claudius Sanza, Yan Liu, Mark Edward Dame
  • Publication number: 20060028083
    Abstract: In order to provide a less expensive generator, a rotor using nonmagnetic beams is disclosed. The rotor includes a magnetic steel rim connected to a main generator shaft by a hub. The magnetic rim supports the components of the rotor, which includes a plurality of magnets and pole pieces. The pole pieces are connected to the rim with non-magnetic standoffs and nonmagnetic fasteners. The magnets are supported radially by nonmagnetic beams. The magnets are retained tangentially by pole pieces and radially by wedges. The components of the rotor are further retained axially between plates coupled to the rim and a shoulder on the pole pieces.
    Type: Application
    Filed: July 28, 2005
    Publication date: February 9, 2006
    Inventors: Daniel Costin, Vinod John
  • Publication number: 20060004531
    Abstract: An apparatus for anti-islanding protection of a distributed generation with respect to a feeder connected to an electrical grid is disclosed. The apparatus includes a sensor adapted to generate a voltage signal representative of an output voltage and/or a current signal representative of an output current at the distributed generation, and a controller responsive to the signals from the sensor. The controller is productive of a control signal directed to the distributed generation to drive an operating characteristic of the distributed generation out of a nominal range in response to the electrical grid being disconnected from the feeder.
    Type: Application
    Filed: October 1, 2003
    Publication date: January 5, 2006
    Inventors: Zhihong Ye, Vinod John, Changyong Wang, Luis Garces, Rui Zhou, Lei Li, Reigh Walling, William Premerlani, Peter Sanza, Yan Liu, Mark Dame
  • Patent number: 6563722
    Abstract: A method and system for compensating for line imbalances in line commutated converters. The controller includes a phase-locked loop (PLL) synchronizing tool which receives the line to line voltage signals and generates firing angle and frequency signals used for synchronizing the two input signals. The PLL controller, in addition to the firing angle and frequency signals, also generates signals representative of filtered values of amplitudes for each of the line to line voltage signals. A voltage imbalance compensation processor associated with the bridge firing controller receives the filtered amplitude signals and also a signal representative of the firing sector of the bridge. The voltage imbalance compensation processor generates, based upon the sector signal and the received filtered amplitude signals a amplitude signal used by a current regulator which is compensated for line imbalances present in the line voltage.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: May 13, 2003
    Assignee: General Electric Company
    Inventors: Vinod John, Luis Jose Garces, Peter Claudius Sanza, Paul Michael Szczesny
  • Patent number: 6556462
    Abstract: A high power factor converter system comprises an input rectifier, a converter and a booster circuit. The input rectifier is configured for rectifying an input ac voltage. The converter is configured for generating an output voltage for the high power factor converter system. The converter comprises several converter switches and inverse parallel diodes. The booster circuit comprises an inductor and at least one converter switch and an inverse parallel diode of the converter. The inductor is coupled between the input rectifier and the converter. The booster circuit is configured for controlling the supply of a booster current through the inductor to be discontinuous when the instantaneous voltage level is less than a predetermined fraction of a dc voltage level across the converter and continuous when the instantaneous voltage level is greater than the predetermined fraction of the dc voltage level.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: April 29, 2003
    Assignee: General Electric Company
    Inventors: Robert Louis Steigerwald, Vinod John, Milan Zarko Ilic
  • Patent number: 6385066
    Abstract: A method and system for determining zero current level occurrences in a reversible power converter without requiring additional component complexity and costs. A digital controller selectively determines the line to line voltage for the most recently fired thyristor pair. The selected line to line voltage is identified as the bridge reconstruction voltage and is compared against the actual bridge output voltage for the conducting bridge. The difference between the two voltage signals is identified as the bridge error voltage and the sign of its magnitude is indicative of a load current zero level occurrence. A zero current level occurrence happens whenever the bridge error voltage drops below zero. This indication is positive and substantially instantaneous and safely enables the reversal of power flow without the risk of line faults due to cross-bridge short circuits.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: May 7, 2002
    Assignee: General Electric Corporation
    Inventors: Luis Jose Garces, Vinod John, Peter Claudius Sanza, Paul Michael Szczesny
  • Patent number: 6278623
    Abstract: A method and system for compensating for voltage notches in phase locked loop (PLL) control devices. A bridge firing controller receives signals representative of two of the line to line voltages received by the bridge. The controller includes a PLL synchronizing tool which receives the line to line voltage signals and generates a synchronizing phase error signal for aligning the phases of the two input signals. The controller, for a predetermined period following bridge firing, determines whether a voltage notch has occurred. If so, the controller substitutes model control signals for actual control signals so as to reduce the effect of the notch on the generated phase error signal used for synchronization. If not, the controller continues to use the actual control signals to generate the phase error signal. Once the predetermined period has expired, the controller utilizes the actual control signals to generate the phase error signal.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: August 21, 2001
    Assignee: General Electric Company
    Inventors: Luis Jose Garces, Vinod John, Peter Claudius Sanza, Paul Michael Szczesny
  • Patent number: 6208185
    Abstract: An active drive circuit for high power IGBTs provides optimized switching performance for both turn-on and turn-off by incorporating a three-stage action to improve performance characteristics. The gate drive circuit includes a semiconductor switch such as a MOSFET connected in series with a low resistance gate turn-on resistor between the supply line and the gate input line, and a parallel connected bipolar transistor. During the first and third stages of turn-on, the MOSFET switch is turned on to provide rapid charging of the gate, whereas during the second stage the bipolar transistor is turned on to provide a controlled level of current charging of the gate. Similarly, a switch such as an MOSFET is connected in series with a low resistance gate turn-off resistor between the turn-off supply voltage line and the gate input line, and a bipolar transistor is connected in parallel therewith across the supply line and the gate input line.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: March 27, 2001
    Assignee: Wisconsin Alumni Research Corporation
    Inventors: Vinod John, Bum-Seok Suh, Thomas Anthony Lipo
  • Patent number: 6097582
    Abstract: A short circuit protection circuit for IGBTs and similar power switch devices. Device collector voltage, e.g., desaturation voltage, is monitored to detect rapidly the occurrence of a short circuit fault. The voltage between the power device emitter and the Kelvin emitter terminals of the device preferably is also monitored and integrated to obtain an estimate of the current flowing through the power switch device. Circuit protection is implemented if either the measured collector to emitter voltage exceeds a selected level or the estimated current through the device exceeds a selected level. Upon the detection of the fault, a capacitor in parallel with a zener diode is connected between the power switch gate and ground. Thus, following a fault, the gate voltage is driven quickly to a low level as the voltage on the gate is discharged through the capacitor.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: August 1, 2000
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Vinod John, Bum-Seok Suh, Thomas Anthony Lipo