Abstract: A circuit for rotating a digital image through any angle at the rate of one pixel per clock period. First, the circuit divides the image to be rotated into blocks which can be rotated without pause once each is started. Then a nearest neighbor calculating circuit is used to determine the value of each rotated pixel in the block. The circuit is divided and pipelined so that each part can produce its output in one clock cycle. The nearest neighbor calculation is done in two sections of the circuit, and other sections of the circuit set up initial conditions or provide for transitions from one rotated scan line, or block, to the next.

Abstract: A method of decoding Huffman-encoded words at the rate of one per clock cycle. The encoded words are formed into two strings of bits, one for odd numbered code and one for even numbered code, and two decoders in parallel are used, each first shifting in a number of coded bits during a first clock period, and converting the Huffman code to data on a second clock period. The two parallel decoders are timed so that the shift cycle of one decoder occurs at the same time as the conversion cycle of the other. Finally, the two streams of decoded data words are combined into one stream. The result is one output data word per clock cycle.

Abstract: A circuit for decoding Huffman-encoded words describing color pixels in the Lab color space at the rate of one per clock cycle. The encoded words are formed into two strings of bits, one for coded L words and one for a and b words, each set of a and b words encoded into one Huffman code word, and two decoders in parallel are used, each first shifting in a number of coded bits during a first clock period, and converting the Huffman code to data on a second clock period. The two parallel decoders are timed so that the shift cycle of one decoder occurs at the same time as the conversion cycle of the other. Finally, the two streams of decoded data words are combined into one stream. The result is one output data word, either L or ab, per clock cycle.

Abstract: In a circuit for rotating a digital image any multiple of ninety degrees, an addressing method which reduces the number of address lines required. The rotation circuit relies on a memory configuation which can access each image pixel in memory individually, and this normally requires a large number of address lines. This invention takes advantage of the periodic nature of the data being accessed to reduce the number of address lines required.

Abstract: A circuit for increasing the speed of conversion of image pixels from one number of bits to another by processing a plurality of pixels in parallel. The conversion of each pixel typically results in a new value and an error term which is divided up among adjacent pixels. By using a plurality of separate conversion circuits, one for each line, and by processing the xth pixel on one line in parallel with the x-2 pixel on the next line, the plurality of pixels can be processed in parallel. All circuits are identical except that the first circuit must get the error term of the line above it from memory, and the last of the parallel circuits must store in memory the error term for the next plurality of lines.