Patents by Inventor Vinod Pagalone

Vinod Pagalone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940493
    Abstract: A circuit for improving control over asynchronous signal crossings during circuit scan tests includes multiple scan registers and a decoder configured to translate a combined output of the scan registers into multiple one-hot controls to the local clock gates of scan registers disposed in multiple different clock domains. Programmable registers are provided to selectively enable and disable the local clock gates of the different clock domains.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: March 26, 2024
    Assignee: NVIDIA CORP.
    Inventors: Mahmut Yilmaz, Vinod Pagalone, Munish Aggarwal, Doochul Shin
  • Publication number: 20240094291
    Abstract: A circuit for improving control over asynchronous signal crossings during circuit scan tests includes multiple scan registers and a decoder configured to translate a combined output of the scan registers into multiple one-hot controls to the local clock gates of scan registers disposed in multiple different clock domains. Programmable registers are provided to selectively enable and disable the local clock gates of the different clock domains.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Applicant: NVIDIA Corp.
    Inventors: Mahmut Yilmaz, Vinod Pagalone, Munish Aggarwal, Doochul Shin