Patents by Inventor Vinod Pagare

Vinod Pagare has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10754812
    Abstract: Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes first-in first-out (FIFO) cells included in an asynchronous FIFO unit and first and second circuits included in the asynchronous FIFO unit. The first circuit provides first information based on a value of a first bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for storing data information in the selected FIFO cell. The second circuit provides information based on a value of a second bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for reading data information from the selected FIFO cell.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: August 25, 2020
    Assignee: Intel IP Corporation
    Inventor: Vinod Pagare
  • Publication number: 20180267924
    Abstract: Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes first-in first-out (FIFO) cells included in an asynchronous FIFO unit and first and second circuits included in the asynchronous FIFO unit. The first circuit provides first information based on a value of a first bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for storing data information in the selected FIFO cell. The second circuit provides information based on a value of a second bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for reading data information from the selected FIFO cell.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 20, 2018
    Inventor: Vinod Pagare