Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: Aspects of the disclosure relate to wireless communication apparatuses, methods, and other aspects of sliding intermediate frequency filters for carrier aggregation communications. One aspect a high band mixer including a radio frequency (RF) receive signal input, a local oscillator (LO) input, and an IF signal output, a tunable high pass filter including an input and an output, an intermediate frequency (IF) received signal multiplexer including a merged IF CA signal output, a first input, and a second input, an LO input, and an IF signal output, where the RF receive signal input is coupled to the low band mmW CA receive port, and a tunable low pass filter including an input and an output, where the input is coupled to the IF signal output of the low band mixer, and where the output is coupled to the second input of the IF received signal multiplexer.

Abstract: Aspects described herein include devices and methods with chain routing of signals for massive antenna arrays. In some aspects, an apparatus is provided that includes a first millimeter wave (mmW) transceiver having a first port, a second port, one or more antenna elements, a plurality of chain mmW transceiver ports, and switching circuitry. The switching circuitry is controllable by control data to route portions of a merged clock and data signal and a merged control and data signal between a first route between the one or more antenna elements and the first port and a second route between the one or more antenna elements and the second port and a third route between the first port and the plurality of chain mmW transceiver ports and a fourth route between the second port and the plurality of chain mmW transceiver ports.

Abstract: Aspects described herein include devices and methods with chain routing of signals for massive antenna arrays. In some aspects, an apparatus is provided that includes a first millimeter wave (mmW) transceiver having a first port, a second port, one or more antenna elements, a plurality of chain mmW transceiver ports, and switching circuitry. The switching circuitry is controllable by control data to route portions of a merged clock and data signal and a merged control and data signal between a first route between the one or more antenna elements and the first port and a second route between the one or more antenna elements and the second port and a third route between the first port and the plurality of chain mmW transceiver ports and a fourth route between the second port and the plurality of chain mmW transceiver ports.

Abstract: In certain aspects, a method includes receiving a first intermediate frequency (IF) signal and a second IF signal via a common input, upconverting the first IF signal into a first radio frequency (RF) signal, transmitting the first RF signal via a first antenna array, upconverting the second IF signal into a second RF signal, and transmitting the second RF signal via a second antenna array. In a first transit mode, the first RF signal is in a first frequency band and the second RF signal is in a second frequency band, and, in a second transmit mode, the first RF signal and the second RF signal are both in the first frequency band.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: In certain aspects, a method includes receiving a first intermediate frequency (IF) signal and a second IF signal via a common input, upconverting the first IF signal into a first radio frequency (RF) signal, transmitting the first RF signal via a first antenna array, upconverting the second IF signal into a second RF signal, and transmitting the second RF signal via a second antenna array. In a first transit mode, the first RF signal is in a first frequency band and the second RF signal is in a second frequency band, and, in a second transmit mode, the first RF signal and the second RF signal are both in the first frequency band.

Abstract: Certain aspects of the present disclosure are directed to a circuit for switch control. The circuit generally includes a plurality of flip-flops, each of the plurality of flip-flops having an input coupled to a respective one of a plurality of enable signals, a NOR gate having inputs coupled to outputs of the plurality of flip-flops; a plurality of AND gates, each having an input coupled to a respective one of the plurality of enable signals and having another input coupled to an output of the NOR gate, and a delay element coupled between the output of the NOR gate and reset inputs of the plurality of flip-flops.

Abstract: Certain aspects of the present disclosure are directed to a circuit for switch control. The circuit generally includes a plurality of flip-flops, each of the plurality of flip-flops having an input coupled to a respective one of a plurality of enable signals, a NOR gate having inputs coupled to outputs of the plurality of flip-flops; a plurality of AND gates, each having an input coupled to a respective one of the plurality of enable signals and having another input coupled to an output of the NOR gate, and a delay element coupled between the output of the NOR gate and reset inputs of the plurality of flip-flops.

Abstract: Certain aspects of the present disclosure are directed to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element, wherein the first inductive element is coupled in series with the third inductive element. In certain aspects, the circuit also includes a first switch coupled in parallel with the third inductive element, a capacitive element coupled in parallel with the fourth inductive element, wherein a notch is formed at least by the capacitive element and the fourth inductive element, the notch circuit coupled in series with the second inductive element, and a second switch coupled in parallel with the fourth inductive element.

Abstract: Certain aspects of the present disclosure are directed to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element, wherein the first inductive element is coupled in series with the third inductive element. In certain aspects, the circuit also includes a first switch coupled in parallel with the third inductive element, a capacitive element coupled in parallel with the fourth inductive element, wherein a notch is formed at least by the capacitive element and the fourth inductive element, the notch circuit coupled in series with the second inductive element, and a second switch coupled in parallel with the fourth inductive element.

Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

Abstract: Certain aspects of the present disclosure generally relate to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element. In certain aspects, the first inductive element may be coupled in series with the third inductive element. In certain aspects, the circuit also includes a capacitive element coupled in parallel with the fourth inductive element, the capacitive element and the fourth inductive element forming a notch circuit, the notch circuit coupled in series with the second inductive element.