Abstract: A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.

Abstract: Aspects of the disclosure relate to wireless communication apparatuses, methods, and other aspects of sliding intermediate frequency filters for carrier aggregation communications. One aspect a high band mixer including a radio frequency (RF) receive signal input, a local oscillator (LO) input, and an IF signal output, a tunable high pass filter including an input and an output, an intermediate frequency (IF) received signal multiplexer including a merged IF CA signal output, a first input, and a second input, an LO input, and an IF signal output, where the RF receive signal input is coupled to the low band mmW CA receive port, and a tunable low pass filter including an input and an output, where the input is coupled to the IF signal output of the low band mixer, and where the output is coupled to the second input of the IF received signal multiplexer.

Abstract: An apparatus is disclosed for oscillator feedthrough calibration, such as a component arrangement that can be calibrated to account for signal leakage from an oscillator coupled to a mixer circuit. In example aspects, the apparatus includes a mixer circuit having a first stage, a second stage, and tuning circuitry. The first stage includes at least one transistor coupled between a mixer input and a mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuitry includes at least one current source coupled to the at least one transistor of the first stage.

Abstract: In certain aspects, a system includes a voltage-controlled oscillator (VCO), a phase detector configured to receive a reference signal, a frequency divider coupled between an output of the VCO and the phase detector, a phase-to-current circuit coupled to an output of the phase detector, and a temperature circuit configured to output a temperature-dependent voltage. The system also includes a switching circuit configured to selectively couple the phase-to-current circuit to an input of the VCO and configured to selectively couple the temperature circuit to the input of the VCO.

Abstract: A method of self-testing a transceiver integrated circuit substrate includes: providing a test signal to a transmission line that is communicatively coupled, or selectively communicatively coupled, to an input of a power amplifier of a first transceiver subcircuit of the transceiver integrated circuit substrate; providing the test signal from the transmission line to an LNA of an LNA of a second transceiver subcircuit of the transceiver integrated circuit substrate; and measuring the test signal before amplification by the LNA, or after amplification by the LNA, or both.

Abstract: Aspects include amplifiers with different units for improved performance. One amplifier has a first transistor with first gate is coupled to a control input, and a first drain is coupled to a first terminal of an output, a second transistor with a second gate is coupled to the control input, and a second drain is coupled to a second terminal of the output. The amplifier has a third transistor with a third drain coupled to the first transistor source, and a third gate is coupled to a first terminal of an input, and a fourth transistor with a fourth drain is coupled to the second transistor source, and a fourth source gate is coupled to a second terminal of the input, where the first transistor source is not connected to the second transistor drain via one or more transistors.

Abstract: In certain aspects, a system includes a voltage-controlled oscillator (VCO), a phase detector configured to receive a reference signal, a frequency divider coupled between an output of the VCO and the phase detector, a phase-to-current circuit coupled to an output of the phase detector, and a temperature circuit configured to output a temperature-dependent voltage. The system also includes a switching circuit configured to selectively couple the phase-to-current circuit to an input of the VCO and configured to selectively couple the temperature circuit to the input of the VCO.

Abstract: A radio system architecture includes a receiver having multiple sub arrays in a phased array, the multiple sub arrays configured to perform carrier aggregation (CA) and multiple input multiple output (MIMO) signal processing, and provide independent beam management for multiple radio frequency (RF) signals received at each of the multiple sub arrays, and a data processor configured to receive signals from the receiver and extract information regarding wireless communications.

Abstract: An apparatus is disclosed for oscillator feedthrough calibration, such as a component arrangement that can be calibrated to account for signal leakage from an oscillator coupled to a mixer circuit. In example aspects, the apparatus includes a mixer circuit having a first stage, a second stage, and tuning circuitry. The first stage includes at least one transistor coupled between a mixer input and a mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuitry includes at least one current source coupled to the at least one transistor of the first stage.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: Aspects of the disclosure relate to wireless communication apparatuses, methods, and other aspects of sliding intermediate frequency filters for carrier aggregation communications. One aspect a high band mixer including a radio frequency (RF) receive signal input, a local oscillator (LO) input, and an IF signal output, a tunable high pass filter including an input and an output, an intermediate frequency (IF) received signal multiplexer including a merged IF CA signal output, a first input, and a second input, an LO input, and an IF signal output, where the RF receive signal input is coupled to the low band mmW CA receive port, and a tunable low pass filter including an input and an output, where the input is coupled to the IF signal output of the low band mixer, and where the output is coupled to the second input of the IF received signal multiplexer.

Abstract: Aspects described herein include devices and methods with chain routing of signals for massive antenna arrays. In some aspects, an apparatus is provided that includes a first millimeter wave (mmW) transceiver having a first port, a second port, one or more antenna elements, a plurality of chain mmW transceiver ports, and switching circuitry. The switching circuitry is controllable by control data to route portions of a merged clock and data signal and a merged control and data signal between a first route between the one or more antenna elements and the first port and a second route between the one or more antenna elements and the second port and a third route between the first port and the plurality of chain mmW transceiver ports and a fourth route between the second port and the plurality of chain mmW transceiver ports.

Abstract: Aspects described herein include devices and methods with chain routing of signals for massive antenna arrays. In some aspects, an apparatus is provided that includes a first millimeter wave (mmW) transceiver having a first port, a second port, one or more antenna elements, a plurality of chain mmW transceiver ports, and switching circuitry. The switching circuitry is controllable by control data to route portions of a merged clock and data signal and a merged control and data signal between a first route between the one or more antenna elements and the first port and a second route between the one or more antenna elements and the second port and a third route between the first port and the plurality of chain mmW transceiver ports and a fourth route between the second port and the plurality of chain mmW transceiver ports.

Abstract: In certain aspects, a method includes receiving a first intermediate frequency (IF) signal and a second IF signal via a common input, upconverting the first IF signal into a first radio frequency (RF) signal, transmitting the first RF signal via a first antenna array, upconverting the second IF signal into a second RF signal, and transmitting the second RF signal via a second antenna array. In a first transit mode, the first RF signal is in a first frequency band and the second RF signal is in a second frequency band, and, in a second transmit mode, the first RF signal and the second RF signal are both in the first frequency band.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: An aspect relates to an apparatus including a radio frequency (RF) signal power detector. The RF signal power detector includes a first current source configured to generate a first current based on a power level of a first RF signal; a transimpedance amplifier (TIA) configured to generate a first voltage based on the first current, wherein the TIA is coupled between a first upper voltage rail and a lower voltage rail; and a second current source configured to generate a second current related to the first current, wherein the first and second current sources are coupled in series between a second upper voltage rail and the lower voltage rail.

Abstract: In certain aspects, a method includes receiving a first intermediate frequency (IF) signal and a second IF signal via a common input, upconverting the first IF signal into a first radio frequency (RF) signal, transmitting the first RF signal via a first antenna array, upconverting the second IF signal into a second RF signal, and transmitting the second RF signal via a second antenna array. In a first transit mode, the first RF signal is in a first frequency band and the second RF signal is in a second frequency band, and, in a second transmit mode, the first RF signal and the second RF signal are both in the first frequency band.

Abstract: Certain aspects of the present disclosure are directed to a circuit for switch control. The circuit generally includes a plurality of flip-flops, each of the plurality of flip-flops having an input coupled to a respective one of a plurality of enable signals, a NOR gate having inputs coupled to outputs of the plurality of flip-flops; a plurality of AND gates, each having an input coupled to a respective one of the plurality of enable signals and having another input coupled to an output of the NOR gate, and a delay element coupled between the output of the NOR gate and reset inputs of the plurality of flip-flops.